devices should increment pkt.time instead of assiging to it

--HG--
extra : convert_revision : b4ca3c7fc13bf0856eb2a800a11d5611b473ec3e

12 files changed, 28 insertions, 22 deletions

diff --git a/dev/alpha_console.cc b/dev/alpha_console.cc
index e05337bfa..2e46f7be1 100644
--- a/dev/alpha_console.cc
+++ b/dev/alpha_console.cc
@@ -99,7 +99,7 @@ AlphaConsole::read(Packet &pkt)
     assert(pkt.result == Unknown);
     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
 
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
     Addr daddr = pkt.addr - pioAddr;
 
     pkt.allocate();
@@ -191,7 +191,7 @@ AlphaConsole::read(Packet &pkt)
 Tick
 AlphaConsole::write(Packet &pkt)
 {
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
 
     assert(pkt.result == Unknown);
     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
diff --git a/dev/ide_ctrl.cc b/dev/ide_ctrl.cc
index 638be9c3d..abdbe5d0a 100644
--- a/dev/ide_ctrl.cc
+++ b/dev/ide_ctrl.cc
@@ -430,7 +430,7 @@ IdeController::read(Packet &pkt)
     IdeRegType reg_type;
     int disk;
 
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
     pkt.allocate();
     if (pkt.size != 1 && pkt.size != 2 && pkt.size !=4)
          panic("Bad IDE read size: %d\n", pkt.size);
@@ -518,7 +518,7 @@ IdeController::write(Packet &pkt)
     int disk;
     uint8_t oldVal, newVal;
 
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
 
     parseAddr(pkt.addr, offset, channel, reg_type);
 
diff --git a/dev/io_device.cc b/dev/io_device.cc
index 42b3c382f..24f33d84d 100644
--- a/dev/io_device.cc
+++ b/dev/io_device.cc
@@ -116,7 +116,13 @@ DmaPort::recvTiming(Packet &pkt)
         DmaReqState *state;
         state = (DmaReqState*)pkt.senderState;
         state->completionEvent->schedule(pkt.time - pkt.req->getTime());
+        delete pkt.req;
+        delete &pkt;
+    }  else {
+        delete pkt.req;
+        delete &pkt;
     }
+
     return Success;
 }
 
@@ -203,7 +209,7 @@ DmaPort::sendDma(Packet *pkt)
    if (state == Timing) {
        if (sendTiming(pkt) == Failure)
            transmitList.push_back(&packet);
-   } else if (state == Atomic) {*/
+    } else if (state == Atomic) {*/
        sendAtomic(*pkt);
        if (pkt->senderState) {
            DmaReqState *state = (DmaReqState*)pkt->senderState;
diff --git a/dev/io_device.hh b/dev/io_device.hh
index bc0160c46..1f4ef4b6e 100644
--- a/dev/io_device.hh
+++ b/dev/io_device.hh
@@ -167,7 +167,7 @@ class DmaPort : public Port
         friend class DmaPort;
     };
 
-    void sendDma(Packet &pkt);
+    void sendDma(Packet *pkt);
 
   public:
     DmaPort(DmaDevice *dev, Platform *p);
diff --git a/dev/isa_fake.cc b/dev/isa_fake.cc
index 8060d1a7c..2f392a41a 100644
--- a/dev/isa_fake.cc
+++ b/dev/isa_fake.cc
@@ -54,7 +54,7 @@ IsaFake::read(Packet &pkt)
     assert(pkt.result == Unknown);
     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
 
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
 
     DPRINTF(Tsunami, "read  va=%#x size=%d\n", pkt.addr, pkt.size);
 
@@ -80,7 +80,7 @@ IsaFake::read(Packet &pkt)
 Tick
 IsaFake::write(Packet &pkt)
 {
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
     DPRINTF(Tsunami, "write - va=%#x size=%d \n", pkt.addr, pkt.size);
     pkt.result = Success;
     return pioDelay;
diff --git a/dev/ns_gige.cc b/dev/ns_gige.cc
index 02c9bbca4..a2e224ed0 100644
--- a/dev/ns_gige.cc
+++ b/dev/ns_gige.cc
@@ -493,7 +493,7 @@ NSGigE::read(Packet &pkt)
 {
     assert(ioEnable);
 
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
     pkt.allocate();
 
     //The mask is to give you only the offset into the device register file
@@ -729,7 +729,7 @@ NSGigE::write(Packet &pkt)
     DPRINTF(EthernetPIO, "write da=%#x pa=%#x size=%d\n",
             daddr, pkt.addr, pkt.size);
 
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
 
     if (daddr > LAST && daddr <=  RESERVED) {
         panic("Accessing reserved register");
diff --git a/dev/pciconfigall.cc b/dev/pciconfigall.cc
index c3597c486..dfb1d48f6 100644
--- a/dev/pciconfigall.cc
+++ b/dev/pciconfigall.cc
@@ -99,7 +99,7 @@ PciConfigAll::read(Packet &pkt)
     int func = (daddr >> 8) & 0x7;
     int reg = daddr & 0xFF;
 
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
     pkt.allocate();
 
     DPRINTF(PciConfigAll, "read  va=%#x da=%#x size=%d\n", pkt.addr, daddr,
@@ -134,7 +134,7 @@ PciConfigAll::read(Packet &pkt)
 Tick
 PciConfigAll::write(Packet &pkt)
 {
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
 
     assert(pkt.result == Unknown);
     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
diff --git a/dev/sinic.cc b/dev/sinic.cc
index b91ef83b0..b5b6c6cf5 100644
--- a/dev/sinic.cc
+++ b/dev/sinic.cc
@@ -321,7 +321,7 @@ Device::read(Packet &pkt)
     Addr index = daddr >> Regs::VirtualShift;
     Addr raddr = daddr & Regs::VirtualMask;
 
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
     pkt.allocate();
 
     if (!regValid(raddr))
@@ -408,7 +408,7 @@ Device::write(Packet &pkt)
     Addr index = daddr >> Regs::VirtualShift;
     Addr raddr = daddr & Regs::VirtualMask;
 
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
 
     if (!regValid(raddr))
         panic("invalid register: cpu=%d, da=%#x pa=%#x size=%d",
diff --git a/dev/tsunami_cchip.cc b/dev/tsunami_cchip.cc
index f35c34138..7b9032f6e 100644
--- a/dev/tsunami_cchip.cc
+++ b/dev/tsunami_cchip.cc
@@ -76,7 +76,7 @@ TsunamiCChip::read(Packet &pkt)
     assert(pkt.result == Unknown);
     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
 
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
     Addr regnum = (pkt.addr - pioAddr) >> 6;
     Addr daddr = (pkt.addr - pioAddr);
 
@@ -182,7 +182,7 @@ TsunamiCChip::read(Packet &pkt)
 Tick
 TsunamiCChip::write(Packet &pkt)
 {
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
 
 
     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
diff --git a/dev/tsunami_io.cc b/dev/tsunami_io.cc
index ed526bdde..0efcc1028 100644
--- a/dev/tsunami_io.cc
+++ b/dev/tsunami_io.cc
@@ -441,7 +441,7 @@ TsunamiIO::read(Packet &pkt)
     assert(pkt.result == Unknown);
     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
 
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
     Addr daddr = pkt.addr - pioAddr;
 
     DPRINTF(Tsunami, "io read  va=%#x size=%d IOPorrt=%#x\n", pkt.addr,
@@ -505,7 +505,7 @@ TsunamiIO::read(Packet &pkt)
 Tick
 TsunamiIO::write(Packet &pkt)
 {
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
 
     assert(pkt.result == Unknown);
     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
diff --git a/dev/tsunami_pchip.cc b/dev/tsunami_pchip.cc
index 05b480cb8..1323a0548 100644
--- a/dev/tsunami_pchip.cc
+++ b/dev/tsunami_pchip.cc
@@ -71,7 +71,7 @@ TsunamiPChip::read(Packet &pkt)
     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
 
 
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
     pkt.allocate();
     Addr daddr = (pkt.addr - pioAddr) >> 6;;
     assert(pkt.size == sizeof(uint64_t));
@@ -151,7 +151,7 @@ TsunamiPChip::read(Packet &pkt)
 Tick
 TsunamiPChip::write(Packet &pkt)
 {
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
 
     assert(pkt.result == Unknown);
     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
diff --git a/dev/uart8250.cc b/dev/uart8250.cc
index 84885456f..15752c735 100644
--- a/dev/uart8250.cc
+++ b/dev/uart8250.cc
@@ -114,7 +114,7 @@ Uart8250::read(Packet &pkt)
     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
     assert(pkt.size == 1);
 
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
     Addr daddr = pkt.addr - pioAddr;
     pkt.allocate();
 
@@ -198,7 +198,7 @@ Uart8250::write(Packet &pkt)
     assert(pkt.addr >= pioAddr && pkt.addr < pioAddr + pioSize);
     assert(pkt.size == 1);
 
-    pkt.time = curTick + pioDelay;
+    pkt.time += pioDelay;
     Addr daddr = pkt.addr - pioAddr;
 
     DPRINTF(Uart, " write register %#x value %#x\n", daddr, pkt.get<uint8_t>());