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authorGabe Black <gabeblack@google.com>2018-10-12 23:10:01 -0700
committerGabe Black <gabeblack@google.com>2018-11-06 01:06:28 +0000
commitc6ff8d31f241d564ec4162b7b49286131ef78559 (patch)
tree2e997f58dd9892af516d4c8d96e59083719f8e89
parent223840f0b4b99036f8706f531d20a2ccc8fd8bf4 (diff)
downloadgem5-c6ff8d31f241d564ec4162b7b49286131ef78559.tar.xz
mips: Change the integer and fp register widths to be 64 bits.
This makes them more consistent with the other architectures, helping to facilitate having a single, unified type across ISAs in the future. Change-Id: I65efb10e39d453281b8429eeedbb46fa6b023a2b Reviewed-on: https://gem5-review.googlesource.com/c/13620 Reviewed-by: Jason Lowe-Power <jason@lowepower.com> Maintainer: Jason Lowe-Power <jason@lowepower.com>
-rw-r--r--src/arch/mips/registers.hh6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/arch/mips/registers.hh b/src/arch/mips/registers.hh
index 55c2dee03..dbac83995 100644
--- a/src/arch/mips/registers.hh
+++ b/src/arch/mips/registers.hh
@@ -278,11 +278,11 @@ const int NumMiscRegs = MISCREG_NUMREGS;
const int TotalNumRegs = NumIntRegs + NumFloatRegs + NumMiscRegs;
-typedef uint32_t IntReg;
+typedef uint64_t IntReg;
// floating point register file entry type
-typedef uint32_t FloatRegBits;
-typedef float FloatReg;
+typedef uint64_t FloatRegBits;
+typedef double FloatReg;
// cop-0/cop-1 system control register
typedef uint64_t MiscReg;