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authorAli Saidi <Ali.Saidi@ARM.com>2013-04-22 13:20:31 -0400
committerAli Saidi <Ali.Saidi@ARM.com>2013-04-22 13:20:31 -0400
commitc9e4678c16164ca12de951ea6faffc9ab9600b0b (patch)
tree3b8a70aadb872a93c7a0a4df6604148e50074006
parent5dd23833fdeb0f7b152c972f47ff81d5595c6fea (diff)
downloadgem5-c9e4678c16164ca12de951ea6faffc9ab9600b0b.tar.xz
cpu: fix a switching issue with the o3 cpu.
This change fixes the switcheroo test that broke earlier this month. The code that was checking for the pipeline being blocked wasn't checking for a pending translation, only for a icache access.
-rw-r--r--src/cpu/o3/fetch_impl.hh3
1 files changed, 2 insertions, 1 deletions
diff --git a/src/cpu/o3/fetch_impl.hh b/src/cpu/o3/fetch_impl.hh
index 249111f3d..43effa9d7 100644
--- a/src/cpu/o3/fetch_impl.hh
+++ b/src/cpu/o3/fetch_impl.hh
@@ -1049,7 +1049,8 @@ DefaultFetch<Impl>::checkSignalsAndUpdate(ThreadID tid)
if (checkStall(tid) &&
fetchStatus[tid] != IcacheWaitResponse &&
fetchStatus[tid] != IcacheWaitRetry &&
- fetchStatus[tid] != ItlbWait) {
+ fetchStatus[tid] != ItlbWait &&
+ fetchStatus[tid] != QuiescePending) {
DPRINTF(Fetch, "[tid:%i]: Setting to blocked\n",tid);
fetchStatus[tid] = Blocked;