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| author | Bjoern A. Zeeb <baz21@cam.ac.uk> | 2017-02-09 18:59:55 -0500 |
|---|---|---|
| committer | Bjoern A. Zeeb <baz21@cam.ac.uk> | 2017-02-09 18:59:55 -0500 |
| commit | d728f6786b26a66816f1d4ae0abdefd01e5ec3c4 (patch) | |
| tree | 2b6fc19794cf2ea18ea9a749244efd4be4717f80 | |
| parent | f0786704db90b0020066d19652886b9311516b45 (diff) | |
| download | gem5-d728f6786b26a66816f1d4ae0abdefd01e5ec3c4.tar.xz | |
dev: net/i8254xGBe add two more wakeup registers to ignore
There are drivers writing to WUFC uncondtionally of anything. In order to
not panic gem5 in these cases, ignore writes to WUFC and WUS as we do for
WUC. Similarly return 0 (default reset value) on reads.
Testing Done: Booted in FS with such a driver revision which would
previously panic and now boots fine.
Reviewed at http://reviews.gem5.org/r/3791/
Signed-off-by: Jason Lowe-Power <jason@lowepower.com>
| -rw-r--r-- | src/dev/net/i8254xGBe.cc | 4 | ||||
| -rw-r--r-- | src/dev/net/i8254xGBe_defs.hh | 2 |
2 files changed, 6 insertions, 0 deletions
diff --git a/src/dev/net/i8254xGBe.cc b/src/dev/net/i8254xGBe.cc index baca0138f..70909549a 100644 --- a/src/dev/net/i8254xGBe.cc +++ b/src/dev/net/i8254xGBe.cc @@ -240,6 +240,8 @@ IGbE::read(PacketPtr pkt) pkt->set<uint32_t>(regs.pba()); break; case REG_WUC: + case REG_WUFC: + case REG_WUS: case REG_LEDCTL: pkt->set<uint32_t>(0); // We don't care, so just return 0 break; @@ -546,6 +548,8 @@ IGbE::write(PacketPtr pkt) regs.pba.txa(64 - regs.pba.rxa()); break; case REG_WUC: + case REG_WUFC: + case REG_WUS: case REG_LEDCTL: case REG_FCAL: case REG_FCAH: diff --git a/src/dev/net/i8254xGBe_defs.hh b/src/dev/net/i8254xGBe_defs.hh index 0bb29e56b..732d1d196 100644 --- a/src/dev/net/i8254xGBe_defs.hh +++ b/src/dev/net/i8254xGBe_defs.hh @@ -94,6 +94,8 @@ const uint32_t REG_RAH = 0x05404; const uint32_t REG_VFTA = 0x05600; const uint32_t REG_WUC = 0x05800; +const uint32_t REG_WUFC = 0x05808; +const uint32_t REG_WUS = 0x05810; const uint32_t REG_MANC = 0x05820; const uint32_t REG_SWSM = 0x05B50; const uint32_t REG_FWSM = 0x05B54; |