X86: Use the new forced folding mechanism for the SAHF and LAHF instructions.

2 files changed, 4 insertions, 26 deletions

diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa
index 84d18441d..f365ed4b0 100644
--- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa
@@ -330,14 +330,8 @@
             //The 64 bit versions of both of these should be illegal only
             //if CPUID says it isn't supported. For now, we'll just assume
             //that it's supported.
-            0x6: decode MODE_SUBMODE {
-                0x0: SAHF_64();
-                default: SAHF();
-            }
-            0x7: decode MODE_SUBMODE {
-                0x0: LAHF_64();
-                default: LAHF();
-            }
+            0x6: SAHF();
+            0x7: LAHF();
         }
         0x14: decode OPCODE_OP_BOTTOM3 {
             0x0: MOV(rAb, Ob);
diff --git a/src/arch/x86/isa/insts/general_purpose/flags/load_and_store.py b/src/arch/x86/isa/insts/general_purpose/flags/load_and_store.py
index 0915bf819..01908ca7b 100644
--- a/src/arch/x86/isa/insts/general_purpose/flags/load_and_store.py
+++ b/src/arch/x86/isa/insts/general_purpose/flags/load_and_store.py
@@ -55,26 +55,10 @@
 
 microcode = '''
 def macroop SAHF {
-    # This will fold to ah since this never executes in 64 bit mode.
-    ruflags rsp, dataSize=1
-};
-
-# This is allows the instruction to write to ah in 64 bit mode.
-def macroop SAHF_64 {
-    ruflags t1
-    slli t1, t1, 8
-    mov t1, t1, rax, dataSize=1
-    mov rax, rax, t1, dataSize=2
+    ruflags ah, dataSize=1
 };
 
 def macroop LAHF {
-    # This will fold to ah since this never executes in 64 bit mode.
-    wruflags rsp, t0, dataSize=1
-};
-
-# This is allows the instruction to read from ah in 64 bit mode.
-def macroop LAHF_64 {
-    srli t1, rax, 8, dataSize=2
-    wruflags t1, t0, dataSize=1
+    wruflags ah, t0, dataSize=1
 };
 '''