summaryrefslogtreecommitdiff
path: root/arch/alpha/isa_desc
diff options
context:
space:
mode:
authorKevin Lim <ktlim@umich.edu>2005-01-11 19:00:16 -0500
committerKevin Lim <ktlim@umich.edu>2005-01-11 19:00:16 -0500
commit42f3b4ffb3fedcb70e9ff068ed7160dc6020b8c4 (patch)
treeba3d10f448bec63df45dff3bb7f2d6fbd6dcf9c7 /arch/alpha/isa_desc
parent202758eea20c092bb85d1886898c3816f377d288 (diff)
parent90d4436351620bd3861013333aabd152d5492df7 (diff)
downloadgem5-42f3b4ffb3fedcb70e9ff068ed7160dc6020b8c4.tar.xz
Merge changes.
base/traceflags.py: Merge extra new CPU flags cpu/static_inst.hh: Include all the execute functions in static_inst_impl.hh --HG-- extra : convert_revision : 78eb753bf709d37400e7c2418bb35d842d7c3f63
Diffstat (limited to 'arch/alpha/isa_desc')
-rw-r--r--arch/alpha/isa_desc4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/alpha/isa_desc b/arch/alpha/isa_desc
index 5154d78d1..fbd4cfe60 100644
--- a/arch/alpha/isa_desc
+++ b/arch/alpha/isa_desc
@@ -2480,9 +2480,9 @@ decode OPCODE default Unknown::unknown() {
xc->syscall();
}}, IsNonSpeculative);
// Read uniq reg into ABI return value register (r0)
- 0x9e: rduniq({{ R0 = Runiq; }});
+ 0x9e: rduniq({{ R0 = Runiq; }}, IsNonSpeculative);
// Write uniq reg with value from ABI arg register (r16)
- 0x9f: wruniq({{ Runiq = R16; }});
+ 0x9f: wruniq({{ Runiq = R16; }}, IsNonSpeculative);
}
}
#endif