diff options
author | Ron Dreslinski <rdreslin@umich.edu> | 2006-02-15 22:05:23 -0500 |
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committer | Ron Dreslinski <rdreslin@umich.edu> | 2006-02-15 22:05:23 -0500 |
commit | d142788172ee79e6e67fc8510940c884807305ad (patch) | |
tree | d1c665421357acae6f17cedc4168789f1913f6b1 /cpu | |
parent | b8a2d1e5c78eac41125a0be0bc2b5d5fe4714684 (diff) | |
download | gem5-d142788172ee79e6e67fc8510940c884807305ad.tar.xz |
More compilation fixes.
Should we add a proxy_port that does the v->p address translation?
Should the proxy port return a fault on translation errors, if we add one?
arch/alpha/alpha_linux_process.cc:
Syscalls use a memPort through the CPU now instead of a xc functional memory.
cpu/base.hh:
Add a pointer to the memPort syscalls will use. Should this be a proxy_port that does address translation?
cpu/exec_context.cc:
cpu/exec_context.hh:
Remove functional memory from the exec context
cpu/simple/cpu.cc:
Set the memPort to be used as the syscall port as the dcache port
sim/syscall_emul.cc:
sim/syscall_emul.hh:
Syscalls use a memPort through the CPU now instead of a xc functional memory.
Also, fix the fact that readStringFunctional doesn't return a fault... should proxy_port handle this because it is doing the translation?
--HG--
extra : convert_revision : 1f65318c6594301a75dc4dc0c99fdd436b094a7f
Diffstat (limited to 'cpu')
-rw-r--r-- | cpu/base.hh | 9 | ||||
-rw-r--r-- | cpu/exec_context.cc | 4 | ||||
-rw-r--r-- | cpu/exec_context.hh | 5 | ||||
-rw-r--r-- | cpu/simple/cpu.cc | 2 |
4 files changed, 16 insertions, 4 deletions
diff --git a/cpu/base.hh b/cpu/base.hh index 826dcb2ec..870e26a39 100644 --- a/cpu/base.hh +++ b/cpu/base.hh @@ -41,6 +41,7 @@ class System; class BranchPred; class ExecContext; +class Port; class BaseCPU : public SimObject { @@ -154,6 +155,14 @@ class BaseCPU : public SimObject int number_of_threads; /** + * A pointer to the port into the memory system to be used by syscall + * emulation. This way the data being accessed via syscalls looks in + * the memory heirachy for any changes that haven't been written back + * to main memory yet. + */ + Port* memPort; + + /** * Vector of per-thread instruction-based event queues. Used for * scheduling events based on number of instructions committed by * a particular thread. diff --git a/cpu/exec_context.cc b/cpu/exec_context.cc index edab25d0b..a281609f4 100644 --- a/cpu/exec_context.cc +++ b/cpu/exec_context.cc @@ -80,7 +80,7 @@ ExecContext::ExecContext(BaseCPU *_cpu, int _thread_num, System *_system, Memory *_mem, Process *_process, int _asid) : _status(ExecContext::Unallocated), cpu(_cpu), thread_num(_thread_num), cpu_id(-1), - system(_system), mem(_mem), + system(_system), process(_process), asid(_asid), func_exe_inst(0), storeCondFailures(0) @@ -109,7 +109,7 @@ void ExecContext::takeOverFrom(ExecContext *oldContext) { // some things should already be set up - assert(mem == oldContext->mem); +// assert(mem == oldContext->mem); #if FULL_SYSTEM assert(system == oldContext->system); #else diff --git a/cpu/exec_context.hh b/cpu/exec_context.hh index 8ab3506db..c40b00e4c 100644 --- a/cpu/exec_context.hh +++ b/cpu/exec_context.hh @@ -122,7 +122,7 @@ class ExecContext int cpu_id; System *system; - Memory *mem; +// Memory *mem; #if FULL_SYSTEM AlphaITB *itb; @@ -243,6 +243,7 @@ class ExecContext #endif +/* template <class T> Fault read(CpuRequestPtr &req, T &data) { @@ -308,7 +309,7 @@ class ExecContext #endif return mem->prot_write(req->paddr, (T)htog(data), req->size); } - +*/ virtual bool misspeculating(); diff --git a/cpu/simple/cpu.cc b/cpu/simple/cpu.cc index b6823fb63..7f589548d 100644 --- a/cpu/simple/cpu.cc +++ b/cpu/simple/cpu.cc @@ -152,6 +152,8 @@ SimpleCPU::SimpleCPU(Params *p) xc = new ExecContext(this, /* thread_num */ 0, p->process, /* asid */ 0); #endif // !FULL_SYSTEM + xc->memPort = dcachePort; + req = new CpuRequest; req->asid = 0; |