make ide disk work for newmem

SConscript:
    compile ide devices
base/chunk_generator.hh:
    add another parameter to the chuck generator called complete() which
    returns the number of bytes transfered so far. Very useful for
    adding to a pointer.
configs/test/fs.py:
    Add ide disk to fs test configuration
dev/ide_ctrl.cc:
dev/ide_ctrl.hh:
dev/ide_disk.cc:
dev/ide_disk.hh:
dev/io_device.cc:
dev/io_device.hh:
dev/pciconfigall.cc:
dev/pciconfigall.hh:
dev/pcidev.cc:
dev/pcidev.hh:
    update for new memory system
mem/bus.cc:
    support devices that return multiple ranges
    remove old ranges before using new info
mem/packet.hh:
    make senderstate void* per steve's request that we use every
    construct possible in C++
mem/physical.cc:
    have memory stamp the packet with the time.
mem/physical.hh:
    actually set the memory latency variable
python/m5/objects/Device.py:
    Add DmaDevice
python/m5/objects/Ide.py:
    Ide disk no longer has a physmem pointer
python/m5/objects/Pci.py:
    update pci device for newmem
python/m5/objects/PhysicalMemory.py:
    add latency parameter for physical memory
sim/byteswap.hh:
    use fast architecture dependent byteswap calls if they exist

--HG--
extra : convert_revision : e3cf2e8f61064ad302d94bc22010a00c59f3f793

1 files changed, 26 insertions, 15 deletions

diff --git a/dev/io_device.cc b/dev/io_device.cc
index a2e5a8a0d..4a84b6817 100644
--- a/dev/io_device.cc
+++ b/dev/io_device.cc
@@ -105,23 +105,24 @@ BasicPioDevice::addressRanges(AddrRangeList &range_list)
 }
 
 
-DmaPort::DmaPort(DmaDevice *dev)
-        : device(dev)
+DmaPort::DmaPort(DmaDevice *dev, Platform *p)
+        : device(dev), platform(p), pendingCount(0)
 { }
 
 bool
 DmaPort::recvTiming(Packet &pkt)
 {
-    completionEvent->schedule(curTick+1);
-    completionEvent = NULL;
+    if (pkt.senderState) {
+        DmaReqState *state;
+        state = (DmaReqState*)pkt.senderState;
+        state->completionEvent->schedule(pkt.time - pkt.req->getTime());
+    }
     return Success;
 }
 
 DmaDevice::DmaDevice(Params *p)
-    : PioDevice(p)
-{
-    dmaPort = new DmaPort(this);
-}
+    : PioDevice(p), dmaPort(NULL)
+{ }
 
 void
 DmaPort::SendEvent::process()
@@ -140,8 +141,8 @@ DmaPort::recvRetry()
     return pkt;
 }
 void
-DmaPort::dmaAction(Command cmd, DmaPort port, Addr addr, int size,
-                     Event *event, uint8_t *data)
+DmaPort::dmaAction(Command cmd, Addr addr, int size, Event *event,
+        uint8_t *data)
 {
 
     assert(event);
@@ -161,8 +162,6 @@ DmaPort::dmaAction(Command cmd, DmaPort port, Addr addr, int size,
 //    baseReq.nicReq = true;
     baseReq.setTime(curTick);
 
-    completionEvent = event;
-
     for (ChunkGenerator gen(addr, size, peerBlockSize());
          !gen.done(); gen.next()) {
             Packet *pkt = new Packet(basePkt);
@@ -175,7 +174,15 @@ DmaPort::dmaAction(Command cmd, DmaPort port, Addr addr, int size,
             // Increment the data pointer on a write
             pkt->data = data ? data + prevSize : NULL ;
             prevSize += pkt->size;
-
+            // Set the last bit of the dma as the final packet for this dma
+            // and set it's completion event.
+            if (prevSize == size) {
+                DmaReqState *state = new DmaReqState(event, true);
+
+                pkt->senderState = (void*)state;
+            }
+            assert(pendingCount >= 0);
+            pendingCount++;
             sendDma(*pkt);
     }
 }
@@ -194,8 +201,12 @@ DmaPort::sendDma(Packet &pkt)
            transmitList.push_back(&packet);
    } else if (state == Atomic) {*/
        sendAtomic(pkt);
-       completionEvent->schedule(pkt.time - pkt.req->getTime());
-       completionEvent = NULL;
+       if (pkt.senderState) {
+           DmaReqState *state = (DmaReqState*)pkt.senderState;
+           state->completionEvent->schedule(curTick + (pkt.time - pkt.req->getTime()) +1);
+       }
+        pendingCount--;
+        assert(pendingCount >= 0);
 /*   } else if (state == Functional) {
        sendFunctional(pkt);
        // Is this correct???