diff options
| author | Benjamin Nash <benash@umich.edu> | 2005-07-13 12:30:13 -0400 |
|---|---|---|
| committer | Benjamin Nash <benash@umich.edu> | 2005-07-13 12:30:13 -0400 |
| commit | 32b52fe7126091692c0a76314bb3692fa3f70d27 (patch) | |
| tree | 70a8172ea171a31ffc88c683eadeb1a9f1175c9a /dev/uart8250.cc | |
| parent | 6d7911dea0a4f60cbe6726416a9e3248843cc03b (diff) | |
| download | gem5-32b52fe7126091692c0a76314bb3692fa3f70d27.tar.xz | |
Various changes to m5/dev files to work with FreeBSD.
dev/ide_ctrl.cc:
dev/ide_disk.cc:
dev/pcidev.cc:
Made endian-independent.
dev/ide_disk.hh:
fixed.
dev/pciconfigall.cc:
The data to write is contained in a 32-bit unsigned int now. The union method would not have worked on big-endian machines.
dev/pcidev.hh:
Fixed typo.
dev/tsunami_io.cc:
Return zero on RTC alarm reads.
dev/uart8250.cc:
Fix uart interrupt handling.
--HG--
extra : convert_revision : b5c08e8e77644c399c20888666406805ff1b6649
Diffstat (limited to 'dev/uart8250.cc')
| -rw-r--r-- | dev/uart8250.cc | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/dev/uart8250.cc b/dev/uart8250.cc index 99e3bd017..63756042a 100644 --- a/dev/uart8250.cc +++ b/dev/uart8250.cc @@ -88,7 +88,7 @@ Uart8250::IntrEvent::process() void Uart8250::IntrEvent::scheduleIntr() { - static const Tick interval = (Tick)((Clock::Float::s / 2e9) * 450); + static const Tick interval = (Tick)((Clock::Float::s / 2e9) * 600); DPRINTF(Uart, "Scheduling IER interrupt for %#x, at cycle %lld\n", intrBit, curTick + interval); if (!scheduled()) @@ -146,10 +146,11 @@ Uart8250::read(MemReqPtr &req, uint8_t *data) break; case 0x2: // Intr Identification Register (IIR) DPRINTF(Uart, "IIR Read, status = %#x\n", (uint32_t)status); - if (status) - *(uint8_t*)data = 0; + status &= ~TX_INT; + if (status & RX_INT) + *(uint8_t*)data = 0x4; else - *(uint8_t*)data = 1; + *(uint8_t*)data = 0x1; break; case 0x3: // Line Control Register (LCR) *(uint8_t*)data = LCR; |