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author | Gabe Black <gblack@eecs.umich.edu> | 2009-02-25 10:16:15 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2009-02-25 10:16:15 -0800 |
commit | 6ed47e94644f854baa33d1e9f367cc9eebd99abf (patch) | |
tree | bc19d10504d3ef0bcaa56b6256cfc732897d1531 /src/arch/alpha/tlb.hh | |
parent | 15940d06b5f6aabbe917a2a8c4cc4bb1cab991e2 (diff) | |
download | gem5-6ed47e94644f854baa33d1e9f367cc9eebd99abf.tar.xz |
CPU: Implement translateTiming which defers to translateAtomic, and convert the timing simple CPU to use it.
Diffstat (limited to 'src/arch/alpha/tlb.hh')
-rw-r--r-- | src/arch/alpha/tlb.hh | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/src/arch/alpha/tlb.hh b/src/arch/alpha/tlb.hh index f5d2dbca9..877533797 100644 --- a/src/arch/alpha/tlb.hh +++ b/src/arch/alpha/tlb.hh @@ -131,7 +131,9 @@ class ITB : public TLB ITB(const Params *p); virtual void regStats(); - Fault translateAtomic(RequestPtr &req, ThreadContext *tc); + Fault translateAtomic(RequestPtr req, ThreadContext *tc); + void translateTiming(RequestPtr req, ThreadContext *tc, + Translation *translation); }; class DTB : public TLB @@ -155,7 +157,9 @@ class DTB : public TLB DTB(const Params *p); virtual void regStats(); - Fault translateAtomic(RequestPtr &req, ThreadContext *tc, bool write); + Fault translateAtomic(RequestPtr req, ThreadContext *tc, bool write); + void translateTiming(RequestPtr req, ThreadContext *tc, + Translation *translation, bool write); }; } // namespace AlphaISA |