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| author | Gabe Black <gabeblack@google.com> | 2019-11-25 02:26:51 -0800 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2019-12-10 23:58:14 +0000 |
| commit | 390a74f59934b85d91489f8a563450d8321b602d (patch) | |
| tree | c5a31b56a74e888c61f0645349b58535d2eae26a /src/arch/alpha | |
| parent | cb3457ccd17a89a4df3e70d35e0254c77a0b5782 (diff) | |
| download | gem5-390a74f59934b85d91489f8a563450d8321b602d.tar.xz | |
sim,arch: Collapse the ISA specific versions of m5Syscall.
The x86 version doesn't do anything x86 specific, and so can be used
generically in sim/pseudo_inst.(hh|cc)
Jira Issue: https://gem5.atlassian.net/browse/GEM5-187
Change-Id: I46c2a7d326bd7a95daa8611888051c180e92e446
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23177
Tested-by: kokoro <noreply+kokoro@google.com>
Reviewed-by: Gabe Black <gabeblack@google.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/alpha')
| -rw-r--r-- | src/arch/alpha/pseudo_inst.hh | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/src/arch/alpha/pseudo_inst.hh b/src/arch/alpha/pseudo_inst.hh index 9f8b508c2..f15d0f572 100644 --- a/src/arch/alpha/pseudo_inst.hh +++ b/src/arch/alpha/pseudo_inst.hh @@ -32,14 +32,13 @@ #define __ARCH_ALPHA_PSEUDO_INST_HH__ #include "arch/generic/pseudo_inst.hh" -#include "base/logging.hh" -class ThreadContext; +namespace AlphaISA +{ -namespace AlphaISA { - using GenericISA::m5Syscall; - using GenericISA::m5PageFault; -} +using GenericISA::m5PageFault; + +} // namespace AlphaISA #endif // __ARCH_ALPHA_PSEUDO_INST_HH__ |