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authorGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:08 -0500
committerGabe Black <gblack@eecs.umich.edu>2010-06-02 12:58:08 -0500
commit6c1b10043fd7c79e1beaae8dd52b93c12fdec42c (patch)
treedacb2d78a3543738db295ea428ee46b809538373 /src/arch/arm/insts/misc.cc
parentf9d1bba22a9e73ab45c0e255ca70eb509915181a (diff)
downloadgem5-6c1b10043fd7c79e1beaae8dd52b93c12fdec42c.tar.xz
ARM: Rename the RevOp base class to something more generic.
Diffstat (limited to 'src/arch/arm/insts/misc.cc')
-rw-r--r--src/arch/arm/insts/misc.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/insts/misc.cc b/src/arch/arm/insts/misc.cc
index 20f102e72..a63bad690 100644
--- a/src/arch/arm/insts/misc.cc
+++ b/src/arch/arm/insts/misc.cc
@@ -144,7 +144,7 @@ MsrRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
}
std::string
-RevOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
+RegRegOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{
std::stringstream ss;
printMnemonic(ss);