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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:16 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:16 -0500 |
| commit | e9c8f68c0fcfb72934b852a61671fb94a1927e1d (patch) | |
| tree | 25c89e490c733f3a3afdd775f2c7a094a69fe4a1 /src/arch/arm/insts/misc.hh | |
| parent | 05bd3eb4ec3d9fea3dbc46112a47459085d3011c (diff) | |
| download | gem5-e9c8f68c0fcfb72934b852a61671fb94a1927e1d.tar.xz | |
ARM: Make undefined instructions obey predication.
Diffstat (limited to 'src/arch/arm/insts/misc.hh')
| -rw-r--r-- | src/arch/arm/insts/misc.hh | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/src/arch/arm/insts/misc.hh b/src/arch/arm/insts/misc.hh index 6d78b311a..c9e114f85 100644 --- a/src/arch/arm/insts/misc.hh +++ b/src/arch/arm/insts/misc.hh @@ -258,4 +258,15 @@ class RegImmRegShiftOp : public PredOp std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; }; +class UnknownOp : public PredOp +{ + protected: + + UnknownOp(const char *mnem, ExtMachInst _machInst, OpClass __opClass) : + PredOp(mnem, _machInst, __opClass) + {} + + std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; +}; + #endif |