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author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:18 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:18 -0500 |
commit | 85ba2a32436aa7dde2319f213b5f410a80c6453a (patch) | |
tree | e7107454a5df8c89f8f62aba18f8202bd4d60b23 /src/arch/arm/isa/formats/uncond.isa | |
parent | e50e6a260f5316871ad53ae44d1b10ceb2ca267f (diff) | |
download | gem5-85ba2a32436aa7dde2319f213b5f410a80c6453a.tar.xz |
ARM: Decode the neon instruction space.
Diffstat (limited to 'src/arch/arm/isa/formats/uncond.isa')
-rw-r--r-- | src/arch/arm/isa/formats/uncond.isa | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/src/arch/arm/isa/formats/uncond.isa b/src/arch/arm/isa/formats/uncond.isa index 8aa460081..f4cc16262 100644 --- a/src/arch/arm/isa/formats/uncond.isa +++ b/src/arch/arm/isa/formats/uncond.isa @@ -54,13 +54,10 @@ def format ArmUnconditional() {{ return new Cps(machInst, mods); } } else if (bits(op1, 6, 5) == 0x1) { - return new WarnUnimplemented( - "Advanced SIMD data-processing", machInst); + return decodeNeonData(machInst); } else if (bits(op1, 6, 4) == 0x4) { if (bits(op1, 0) == 0) { - return new WarnUnimplemented( - "Advanced SIMD element or structure load/store", - machInst); + return decodeNeonMem(machInst); } else if (bits(op1, 2, 0) == 1) { // Unallocated memory hint return new NopInst(machInst); |