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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-08-25 19:10:42 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-08-25 19:10:42 -0500 |
| commit | 54a919f22587c75be5e7f0b88d5ec13baba600aa (patch) | |
| tree | 65b9d338a6968f16296e761ab7ce9a4867514b7e /src/arch/arm/isa/operands.isa | |
| parent | 6368edb281f162e4fbb0a91744992a25134135f4 (diff) | |
| download | gem5-54a919f22587c75be5e7f0b88d5ec13baba600aa.tar.xz | |
ARM: Implement CPACR register and return Undefined Instruction when FP access is disabled.
Diffstat (limited to 'src/arch/arm/isa/operands.isa')
| -rw-r--r-- | src/arch/arm/isa/operands.isa | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa index 5490a28e0..7b2b50290 100644 --- a/src/arch/arm/isa/operands.isa +++ b/src/arch/arm/isa/operands.isa @@ -205,6 +205,7 @@ def operands {{ 'Fpsr': ('ControlReg', 'uw', 'MISCREG_FPSR', None, 2), 'Fpsid': ('ControlReg', 'uw', 'MISCREG_FPSID', None, 2), 'Fpscr': ('ControlReg', 'uw', 'MISCREG_FPSCR', None, 2), + 'Cpacr': ('ControlReg', 'uw', 'MISCREG_CPACR', (None, None, 'IsControl'), 2), 'Fpexc': ('ControlReg', 'uw', 'MISCREG_FPEXC', None, 2), 'Sctlr': ('ControlReg', 'uw', 'MISCREG_SCTLR', None, 2), 'SevMailbox': ('ControlReg', 'uw', 'MISCREG_SEV_MAILBOX', None, 2), |