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| author | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:02 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2010-06-02 12:58:02 -0500 |
| commit | 98693436368ef671681859d95f6bc4a0542a6a37 (patch) | |
| tree | b2380bcc0142069996f78e04c31df08ed7ade47a /src/arch/arm/isa/operands.isa | |
| parent | a6c1c8debb523e94312d7e5ff25625b9638efe74 (diff) | |
| download | gem5-98693436368ef671681859d95f6bc4a0542a6a37.tar.xz | |
ARM: Implement branch instructions external to the decoder.
Diffstat (limited to 'src/arch/arm/isa/operands.isa')
| -rw-r--r-- | src/arch/arm/isa/operands.isa | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/arm/isa/operands.isa b/src/arch/arm/isa/operands.isa index 3f331832c..ab4d95d47 100644 --- a/src/arch/arm/isa/operands.isa +++ b/src/arch/arm/isa/operands.isa @@ -68,6 +68,7 @@ let {{ readNPC = 'xc->readNextPC() & ~PcModeMask' writeNPC = 'setNextPC(xc, %(final_val)s)' writeIWNPC = 'setIWNextPC(xc, %(final_val)s)' + forceNPC = 'xc->setNextPC(%(final_val)s)' }}; def operands {{ @@ -125,6 +126,8 @@ def operands {{ 'Fpexc': ('ControlReg', 'uw', 'MISCREG_FPEXC', None, 45), 'NPC': ('NPC', 'ud', None, (None, None, 'IsControl'), 51, readNPC, writeNPC), + 'FNPC': ('NPC', 'ud', None, (None, None, 'IsControl'), 51, + readNPC, forceNPC), 'IWNPC': ('NPC', 'ud', None, (None, None, 'IsControl'), 51, readNPC, writeIWNPC), }}; |