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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-08-15 13:30:46 +0100 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2019-08-20 14:23:19 +0000 |
| commit | e97a1fe390a91f30042d683ebc5e654d39844eda (patch) | |
| tree | cb65b1a95de5bec2642af955ad54205f159f9db0 /src/arch/arm/utility.cc | |
| parent | 4ccb1ea710dcdcf179726448596b96c8e44f743a (diff) | |
| download | gem5-e97a1fe390a91f30042d683ebc5e654d39844eda.tar.xz | |
arch-arm: Replace direct use cpsr.el with currEL helper
The patch is replacing it in places where the current EL could be using
AArch32, hence leading to an incorrect ExceptionLevel.
Change-Id: I99b75af2668f2c38fd88bec62e985ab7dbea80dc
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/20251
Maintainer: Andreas Sandberg <andreas.sandberg@arm.com>
Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/arm/utility.cc')
| -rw-r--r-- | src/arch/arm/utility.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/arm/utility.cc b/src/arch/arm/utility.cc index 2f7d916d2..73537a89c 100644 --- a/src/arch/arm/utility.cc +++ b/src/arch/arm/utility.cc @@ -341,7 +341,7 @@ ELUsingAArch32K(ThreadContext *tc, ExceptionLevel el) // EL0 controlled by PSTATE CPSR cpsr = tc->readMiscReg(MISCREG_CPSR); - known = (cpsr.el == EL0); + known = (currEL(tc) == EL0); aarch32 = (cpsr.width == 1); } else { known = true; |