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authorAli Saidi <Ali.Saidi@ARM.com>2014-04-17 16:55:54 -0500
committerAli Saidi <Ali.Saidi@ARM.com>2014-04-17 16:55:54 -0500
commita00b44ebe8dd5fdc47b5b4acbc7507e578b3f1f2 (patch)
tree88fa940b7ec3ecd54750af5839c83ff5ce6969ac /src/arch/arm
parentc4a2f76fea6f9361363afd901c40290abf3344d9 (diff)
downloadgem5-a00b44ebe8dd5fdc47b5b4acbc7507e578b3f1f2.tar.xz
arm: allow DC instructions by default so SE mode works
Diffstat (limited to 'src/arch/arm')
-rw-r--r--src/arch/arm/isa.cc2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/arch/arm/isa.cc b/src/arch/arm/isa.cc
index 5f8378e09..38607a9ae 100644
--- a/src/arch/arm/isa.cc
+++ b/src/arch/arm/isa.cc
@@ -200,6 +200,8 @@ ISA::clear()
sctlr.rao2 = 1;
sctlr.rao3 = 1;
sctlr.rao4 = 0xf; // SCTLR[6:3]
+ sctlr.uci = 1;
+ sctlr.dze = 1;
miscRegs[MISCREG_SCTLR_NS] = sctlr;
miscRegs[MISCREG_SCTLR_RST] = sctlr_rst;
miscRegs[MISCREG_HCPTR] = 0;