diff options
| author | Korey Sewell <ksewell@umich.edu> | 2007-11-14 06:24:47 -0500 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2007-11-14 06:24:47 -0500 |
| commit | 5f7879a9352985775abef9515e216591a2e3e39d (patch) | |
| tree | 3aa829a03969e0694f914e7e28c597504956a59c /src/arch/mips/tlb.cc | |
| parent | bfdd2f379b89654b15f8634d405666f623d336f2 (diff) | |
| download | gem5-5f7879a9352985775abef9515e216591a2e3e39d.tar.xz | |
Get MIPS_SE actually working again by actually by fixing TLB stuff and running hello world
--HG--
extra : convert_revision : 0944e7661934baddca1f1a895af0b75be2d96b10
Diffstat (limited to 'src/arch/mips/tlb.cc')
| -rw-r--r-- | src/arch/mips/tlb.cc | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/src/arch/mips/tlb.cc b/src/arch/mips/tlb.cc index 15f4b762b..526292603 100644 --- a/src/arch/mips/tlb.cc +++ b/src/arch/mips/tlb.cc @@ -47,6 +47,8 @@ #include "base/str.hh" #include "base/trace.hh" #include "cpu/thread_context.hh" +#include "sim/process.hh" +#include "mem/page_table.hh" #include "params/MipsDTB.hh" #include "params/MipsITB.hh" #include "params/MipsTLB.hh" @@ -314,6 +316,15 @@ TLB::regStats() Fault ITB::translate(RequestPtr &req, ThreadContext *tc) { +#if !FULL_SYSTEM + Process * p = tc->getProcessPtr(); + + Fault fault = p->pTable->translate(req); + if(fault != NoFault) + return fault; + + return NoFault; +#else if(MipsISA::IsKSeg0(req->getVaddr())) { // Address will not be translated through TLB, set response, and go! @@ -416,11 +427,21 @@ ITB::translate(RequestPtr &req, ThreadContext *tc) } } return checkCacheability(req); +#endif } Fault DTB::translate(RequestPtr &req, ThreadContext *tc, bool write) { +#if !FULL_SYSTEM + Process * p = tc->getProcessPtr(); + + Fault fault = p->pTable->translate(req); + if(fault != NoFault) + return fault; + + return NoFault; +#else if(MipsISA::IsKSeg0(req->getVaddr())) { // Address will not be translated through TLB, set response, and go! @@ -544,6 +565,7 @@ DTB::translate(RequestPtr &req, ThreadContext *tc, bool write) } } return checkCacheability(req); +#endif } /////////////////////////////////////////////////////////////////////// |