summaryrefslogtreecommitdiff
path: root/src/arch/mips
diff options
context:
space:
mode:
authorGabe Black <gabeblack@google.com>2019-10-29 19:31:37 -0700
committerGabe Black <gabeblack@google.com>2019-11-18 20:02:31 +0000
commit697e55995626f24658ce443287cd1ba90c2f68eb (patch)
tree4f19d13ded04c4d4b3ae53607fa90638ba96a7bd /src/arch/mips
parent17a0c0b00644c37e9d8539a9de0a02dc213a6834 (diff)
downloadgem5-697e55995626f24658ce443287cd1ba90c2f68eb.tar.xz
arch: Make and use endian specific versions of the mem helpers.
Rather than using TheISA to pick an endian conversion function, we can have a version defined for big and little endian and call the right one from the ISA code. Change-Id: I5014504968952e21abff3c5f6cbe58ca24233f33 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/22373 Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/mips')
-rw-r--r--src/arch/mips/isa/formats/mem.isa14
1 files changed, 7 insertions, 7 deletions
diff --git a/src/arch/mips/isa/formats/mem.isa b/src/arch/mips/isa/formats/mem.isa
index e2204db6f..054690f2e 100644
--- a/src/arch/mips/isa/formats/mem.isa
+++ b/src/arch/mips/isa/formats/mem.isa
@@ -175,7 +175,7 @@ def template LoadExecute {{
%(ea_code)s;
if (fault == NoFault) {
- fault = readMemAtomic(xc, traceData, EA, Mem, memAccessFlags);
+ fault = readMemAtomicLE(xc, traceData, EA, Mem, memAccessFlags);
%(memacc_code)s;
}
@@ -230,7 +230,7 @@ def template LoadCompleteAcc {{
%(op_decl)s;
%(op_rd)s;
- getMem(pkt, Mem, traceData);
+ getMemLE(pkt, Mem, traceData);
if (fault == NoFault) {
%(memacc_code)s;
@@ -261,7 +261,7 @@ def template StoreExecute {{
}
if (fault == NoFault) {
- fault = writeMemAtomic(xc, traceData, Mem, EA, memAccessFlags,
+ fault = writeMemAtomicLE(xc, traceData, Mem, EA, memAccessFlags,
NULL);
}
@@ -297,7 +297,7 @@ def template StoreFPExecute {{
}
if (fault == NoFault) {
- fault = writeMemAtomic(xc, traceData, Mem, EA, memAccessFlags,
+ fault = writeMemAtomicLE(xc, traceData, Mem, EA, memAccessFlags,
NULL);
}
@@ -331,7 +331,7 @@ def template StoreCondExecute {{
}
if (fault == NoFault) {
- fault = writeMemAtomic(xc, traceData, Mem, EA, memAccessFlags,
+ fault = writeMemAtomicLE(xc, traceData, Mem, EA, memAccessFlags,
&write_result);
}
@@ -364,7 +364,7 @@ def template StoreInitiateAcc {{
}
if (fault == NoFault) {
- fault = writeMemTiming(xc, traceData, Mem, EA, memAccessFlags,
+ fault = writeMemTimingLE(xc, traceData, Mem, EA, memAccessFlags,
NULL);
}
@@ -523,7 +523,7 @@ def format StoreUnalignedMemory(memacc_code, ea_code = {{ EA = (Rs + disp) & ~3;
uint32_t byte_offset = unaligned_addr & 3;
if (GuestByteOrder == BigEndianByteOrder)
byte_offset ^= 3;
- fault = readMemAtomic(xc, traceData, EA, mem_word, memAccessFlags);
+ fault = readMemAtomicLE(xc, traceData, EA, mem_word, memAccessFlags);
'''
memacc_code = decl_code + memacc_code + '\nMem = mem_word;\n'