diff options
author | Nathan Binkert <nate@binkert.org> | 2008-10-09 04:58:24 -0700 |
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committer | Nathan Binkert <nate@binkert.org> | 2008-10-09 04:58:24 -0700 |
commit | e06321091d4e931ff1a4d753e56d76f9746c3cd2 (patch) | |
tree | 75e2049ca5ffc65cbfaefa73804571aa933f015b /src/arch/mips | |
parent | 8291d9db0a0bdeecb2a13f28962893ed3659230e (diff) | |
download | gem5-e06321091d4e931ff1a4d753e56d76f9746c3cd2.tar.xz |
eventq: convert all usage of events to use the new API.
For now, there is still a single global event queue, but this is
necessary for making the steps towards a parallelized m5.
Diffstat (limited to 'src/arch/mips')
-rw-r--r--[-rwxr-xr-x] | src/arch/mips/regfile/misc_regfile.cc | 10 | ||||
-rw-r--r-- | src/arch/mips/regfile/regfile.cc | 5 | ||||
-rw-r--r-- | src/arch/mips/regfile/regfile.hh | 8 |
3 files changed, 11 insertions, 12 deletions
diff --git a/src/arch/mips/regfile/misc_regfile.cc b/src/arch/mips/regfile/misc_regfile.cc index 06523a8c9..08487db90 100755..100644 --- a/src/arch/mips/regfile/misc_regfile.cc +++ b/src/arch/mips/regfile/misc_regfile.cc @@ -567,7 +567,7 @@ MiscRegFile::scheduleCP0Update(int delay) //schedule UPDATE CP0Event *cp0_event = new CP0Event(this, cpu, UpdateCP0); - cp0_event->schedule(curTick + cpu->ticks(delay)); + cpu->schedule(cp0_event, curTick + cpu->ticks(delay)); } } @@ -601,8 +601,7 @@ MiscRegFile::updateCPU() } MiscRegFile::CP0Event::CP0Event(CP0 *_cp0, BaseCPU *_cpu, CP0EventType e_type) - : Event(&mainEventQueue, CPU_Tick_Pri), cp0(_cp0), cpu(_cpu), - cp0EventType(e_type) + : Event(CPU_Tick_Pri), cp0(_cp0), cpu(_cpu), cp0EventType(e_type) { } void @@ -627,10 +626,7 @@ MiscRegFile::CP0Event::description() const void MiscRegFile::CP0Event::scheduleEvent(int delay) { - if (squashed()) - reschedule(curTick + cpu->ticks(delay)); - else if (!scheduled()) - schedule(curTick + cpu->ticks(delay)); + cpu->reschedule(this, curTick + cpu->ticks(delay), true); } void diff --git a/src/arch/mips/regfile/regfile.cc b/src/arch/mips/regfile/regfile.cc index 996c14f14..a1c8eab6a 100644 --- a/src/arch/mips/regfile/regfile.cc +++ b/src/arch/mips/regfile/regfile.cc @@ -193,7 +193,7 @@ RegFile::setNextNPC(Addr val) } void -RegFile::serialize(std::ostream &os) +RegFile::serialize(EventManager *em, std::ostream &os) { intRegFile.serialize(os); //SERIALIZE_ARRAY(floatRegFile, NumFloatRegs); @@ -207,7 +207,8 @@ RegFile::serialize(std::ostream &os) } void -RegFile::unserialize(Checkpoint *cp, const std::string §ion) +RegFile::unserialize(EventManager *em, Checkpoint *cp, + const std::string §ion) { intRegFile.unserialize(cp, section); //UNSERIALIZE_ARRAY(floatRegFile); diff --git a/src/arch/mips/regfile/regfile.hh b/src/arch/mips/regfile/regfile.hh index 407d9b50a..076cf45f5 100644 --- a/src/arch/mips/regfile/regfile.hh +++ b/src/arch/mips/regfile/regfile.hh @@ -41,8 +41,9 @@ //#include "cpu/base.hh" #include "sim/faults.hh" -class Checkpoint; class BaseCPU; +class Checkpoint; +class EventManager; namespace MipsISA { @@ -99,8 +100,9 @@ namespace MipsISA Addr readNextNPC(); void setNextNPC(Addr val); - void serialize(std::ostream &os); - void unserialize(Checkpoint *cp, const std::string §ion); + void serialize(EventManager *em, std::ostream &os); + void unserialize(EventManager *em, Checkpoint *cp, + const std::string §ion); void changeContext(RegContextParam param, RegContextVal val) { |