cpu: add a condition-code register class

Add a third register class for condition codes,
in parallel with the integer and FP classes.
No ISAs use the CC class at this point though.

1 files changed, 1 insertions, 0 deletions

diff --git a/src/arch/null/registers.hh b/src/arch/null/registers.hh
index f33b7e5bd..1e52fc5a6 100644
--- a/src/arch/null/registers.hh
+++ b/src/arch/null/registers.hh
@@ -47,6 +47,7 @@ namespace NullISA {
 typedef uint64_t IntReg;
 typedef uint32_t FloatRegBits;
 typedef float FloatReg;
+typedef uint8_t CCReg;
 typedef uint64_t MiscReg;
 
 }