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authorGabe Black <gblack@eecs.umich.edu>2006-10-23 07:55:52 -0400
committerGabe Black <gblack@eecs.umich.edu>2006-10-23 07:55:52 -0400
commit20208d00e6566a7946e589184a7ed9dffb54fc74 (patch)
tree77764410222fd4f064360a8fa624675121d9f40f /src/arch/sparc/isa/includes.isa
parente9908e3c854e534a391448907773ca03c60b13c8 (diff)
downloadgem5-20208d00e6566a7946e589184a7ed9dffb54fc74.tar.xz
Broke Load/Store instructions into microcode, and partially refactored memory operations in the SPARC ISA description.
--HG-- rename : src/arch/sparc/isa/formats.isa => src/arch/sparc/isa/formats/formats.isa rename : src/arch/sparc/isa/formats/mem.isa => src/arch/sparc/isa/formats/mem/basicmem.isa rename : src/arch/sparc/isa/formats/blockmem.isa => src/arch/sparc/isa/formats/mem/blockmem.isa rename : src/arch/sparc/isa/formats/mem.isa => src/arch/sparc/isa/formats/mem/mem.isa extra : convert_revision : dbbb00f997a102871b084b209b9fa08c5e1853ee
Diffstat (limited to 'src/arch/sparc/isa/includes.isa')
-rw-r--r--src/arch/sparc/isa/includes.isa3
1 files changed, 3 insertions, 0 deletions
diff --git a/src/arch/sparc/isa/includes.isa b/src/arch/sparc/isa/includes.isa
index 9fed36b03..a324756ec 100644
--- a/src/arch/sparc/isa/includes.isa
+++ b/src/arch/sparc/isa/includes.isa
@@ -49,6 +49,7 @@ output decoder {{
#include "base/cprintf.hh"
#include "base/loader/symtab.hh"
#include "cpu/thread_context.hh" // for Jump::branchTarget()
+#include "mem/packet.hh"
#if defined(linux)
#include <fenv.h>
@@ -66,6 +67,8 @@ output exec {{
#include "cpu/base.hh"
#include "cpu/exetrace.hh"
#include "sim/sim_exit.hh"
+#include "mem/packet.hh"
+#include "mem/packet_access.hh"
using namespace SparcISA;
}};