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authorGabe Black <gabeblack@google.com>2020-01-29 16:49:40 -0800
committerGabe Black <gabeblack@google.com>2020-02-01 12:31:56 +0000
commit4ae8d1c0ed18f351b52f421553b28fe109f87665 (patch)
tree08f688eed7d45f41f4c3af946bc0afdbf199aebf /src/arch/sparc
parent6a7a5b30050d10a7d9cc9cd5614988871253298d (diff)
downloadgem5-4ae8d1c0ed18f351b52f421553b28fe109f87665.tar.xz
arch,sim: Merge initCPU into the ISA System classes.
Those classes are already ISA specific, so we can just move initCPU's contents there and take it out of utility.hh, utility.cc, and the base System's initState. Change-Id: I28f0d0b50d83efe5116b0b24d20f8182a02823e7 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24905 Reviewed-by: Gabe Black <gabeblack@google.com> Maintainer: Gabe Black <gabeblack@google.com> Tested-by: kokoro <noreply+kokoro@google.com>
Diffstat (limited to 'src/arch/sparc')
-rw-r--r--src/arch/sparc/system.cc9
-rw-r--r--src/arch/sparc/utility.cc12
-rw-r--r--src/arch/sparc/utility.hh2
3 files changed, 9 insertions, 14 deletions
diff --git a/src/arch/sparc/system.cc b/src/arch/sparc/system.cc
index 1a809beba..1a495ccea 100644
--- a/src/arch/sparc/system.cc
+++ b/src/arch/sparc/system.cc
@@ -30,6 +30,7 @@
#include "arch/sparc/system.hh"
+#include "arch/sparc/faults.hh"
#include "arch/vtophys.hh"
#include "base/loader/object_file.hh"
#include "base/loader/symtab.hh"
@@ -154,6 +155,14 @@ SparcSystem::initState()
// @todo any fixup code over writing data in binaries on setting break
// events on functions should happen here.
+
+ if (threadContexts.empty())
+ return;
+
+ // Other CPUs will get activated by IPIs.
+ auto *tc = threadContexts[0];
+ SparcISA::PowerOnReset().invoke(tc);
+ tc->activate();
}
SparcSystem::~SparcSystem()
diff --git a/src/arch/sparc/utility.cc b/src/arch/sparc/utility.cc
index 245f455e4..e1ae56339 100644
--- a/src/arch/sparc/utility.cc
+++ b/src/arch/sparc/utility.cc
@@ -253,16 +253,4 @@ skipFunction(ThreadContext *tc)
tc->pcState(newPC);
}
-
-void
-initCPU(ThreadContext *tc, int cpuId)
-{
- // Other CPUs will get activated by IPIs.
- if (cpuId != 0)
- return;
-
- PowerOnReset().invoke(tc);
- tc->activate();
-}
-
} // namespace SPARC_ISA
diff --git a/src/arch/sparc/utility.hh b/src/arch/sparc/utility.hh
index 74e0c11b8..6318b4356 100644
--- a/src/arch/sparc/utility.hh
+++ b/src/arch/sparc/utility.hh
@@ -62,8 +62,6 @@ inUserMode(ThreadContext *tc)
return !(pstate.priv || hpstate.hpriv);
}
-void initCPU(ThreadContext *tc, int cpuId);
-
void copyRegs(ThreadContext *src, ThreadContext *dest);
void copyMiscRegs(ThreadContext *src, ThreadContext *dest);