diff options
| author | Gabe Black <gabeblack@google.com> | 2018-11-19 18:14:16 -0800 |
|---|---|---|
| committer | Gabe Black <gabeblack@google.com> | 2019-01-31 11:02:05 +0000 |
| commit | 5edfb67041ad1c246f4ceca147f06b9db3c0ecc3 (patch) | |
| tree | 22cc08624db8bfa11e4ea7c9817a864ebc2ea706 /src/arch/sparc | |
| parent | 25474167e5b247d1b91fbf802c5b396a63ae705e (diff) | |
| download | gem5-5edfb67041ad1c246f4ceca147f06b9db3c0ecc3.tar.xz | |
arch: cpu: Rename *FloatRegBits* to *FloatReg*.
Now that there's no plain FloatReg, there's no reason to distinguish
FloatRegBits with a special suffix since it's the only way to read or
write FP registers.
Change-Id: I3a60168c1d4302aed55223ea8e37b421f21efded
Reviewed-on: https://gem5-review.googlesource.com/c/14460
Reviewed-by: Brandon Potter <Brandon.Potter@amd.com>
Reviewed-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Maintainer: Gabe Black <gabeblack@google.com>
Diffstat (limited to 'src/arch/sparc')
| -rw-r--r-- | src/arch/sparc/utility.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/sparc/utility.cc b/src/arch/sparc/utility.cc index 8f997aabf..8b0b4ab32 100644 --- a/src/arch/sparc/utility.cc +++ b/src/arch/sparc/utility.cc @@ -232,7 +232,7 @@ copyRegs(ThreadContext *src, ThreadContext *dest) // Then loop through the floating point registers. for (int i = 0; i < SparcISA::NumFloatArchRegs; ++i) { - dest->setFloatRegBits(i, src->readFloatRegBits(i)); + dest->setFloatReg(i, src->readFloatReg(i)); } // Would need to add condition-code regs if implemented |