cpu: implements vector registers

This adds a vector register type.  The type is defined as a std::array of a
fixed number of uint64_ts.  The isa_parser.py has been modified to parse vector
register operands and generate the required code.  Different cpus have vector
register files now.

1 files changed, 7 insertions, 0 deletions

diff --git a/src/arch/x86/insts/static_inst.cc b/src/arch/x86/insts/static_inst.cc
index 39091289f..49ea6ef4e 100644
--- a/src/arch/x86/insts/static_inst.cc
+++ b/src/arch/x86/insts/static_inst.cc
@@ -225,12 +225,19 @@ namespace X86ISA
             ccprintf(os, "%%cc%d", rel_reg);
             break;
 
+          case VectorRegClass:
+            ccprintf(os, "%%cc%d", rel_reg);
+            break;
+
           case MiscRegClass:
             switch (rel_reg) {
               default:
                 ccprintf(os, "%%ctrl%d", rel_reg);
             }
             break;
+
+          default:
+            panic("Invalid register class!\n");
         }
     }