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authorDavid Hashe <david.hashe@amd.com>2015-07-20 09:15:18 -0500
committerDavid Hashe <david.hashe@amd.com>2015-07-20 09:15:18 -0500
commita2d9aae3c3dae1ffdd62eb91d2318758772684dc (patch)
tree84a3cd2212175939cb6589547f89858d48e7bb55 /src/arch/x86/isa/decoder
parent9560893f0d2e74d1c6c22fee501cd24d4f6e13d7 (diff)
downloadgem5-a2d9aae3c3dae1ffdd62eb91d2318758772684dc.tar.xz
x86: x86 instruction-implementation bug fixes
Added explicit data sizes and an opcode type for correct execution.
Diffstat (limited to 'src/arch/x86/isa/decoder')
-rw-r--r--src/arch/x86/isa/decoder/two_byte_opcodes.isa6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/arch/x86/isa/decoder/two_byte_opcodes.isa b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
index dfc328c4b..0ba7434e8 100644
--- a/src/arch/x86/isa/decoder/two_byte_opcodes.isa
+++ b/src/arch/x86/isa/decoder/two_byte_opcodes.isa
@@ -1,4 +1,5 @@
// Copyright (c) 2007-2008 The Hewlett-Packard Development Company
+// Copyright (c) 2012-2013 AMD
// All rights reserved.
//
// The license below extends only to copyright in the software and shall
@@ -361,6 +362,11 @@
0x3: MOV(Dd,Rd);
default: UD2();
}
+ // operand size (0x66)
+ 0x1: decode OPCODE_OP_BOTTOM3 {
+ 0x0: MOV(Rd,Cd);
+ 0x2: MOV(Cd,Rd);
+ }
default: UD2();
}
0x05: decode LEGACY_DECODEVAL {