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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-03-29 17:57:19 +0000 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-03-29 17:57:19 +0000 |
| commit | 7fcc9d2106e1057f95867a5691c01b2c17278b31 (patch) | |
| tree | 051a6fbc91295cfbd918e8857b92b6d253db023f /src/arch/x86/isa/decoder | |
| parent | e67a207ad302e36fdfbb0a1eae0dadeef5b6a31d (diff) | |
| download | gem5-7fcc9d2106e1057f95867a5691c01b2c17278b31.tar.xz | |
Made the MultiOp format do a little more. It now sets up single microop instructions to return an instance of the right class. The code to decode register numbers and generate loads and stores still needs to be added. Also, a syntax for specifying operands as sources, destinations, or both needs to be established. Multipl microop instructions are also not handled, pending real macroop generation support.
--HG--
extra : convert_revision : 1a0a4b36afce8255e23e3cdd7a85c1392dda5f72
Diffstat (limited to 'src/arch/x86/isa/decoder')
| -rw-r--r-- | src/arch/x86/isa/decoder/one_byte_opcodes.isa | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/isa/decoder/one_byte_opcodes.isa b/src/arch/x86/isa/decoder/one_byte_opcodes.isa index 0f030299a..b4aeece07 100644 --- a/src/arch/x86/isa/decoder/one_byte_opcodes.isa +++ b/src/arch/x86/isa/decoder/one_byte_opcodes.isa @@ -64,7 +64,7 @@ 0x6: push_ES(); 0x7: pop_ES(); default: MultiOp::add( - {{Add op0, op0, op1}}, + {{Add %0 %0 %1}}, OPCODE_OP_BOTTOM3, [[Eb,Gb],[Ev,Gv], [Gb,Eb],[Gv,Ev], |