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author | Gabe Black <gblack@eecs.umich.edu> | 2007-07-19 15:15:47 -0700 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2007-07-19 15:15:47 -0700 |
commit | cfadef74d1d7ce47d0bd30a14a509a15a354849a (patch) | |
tree | dc6329821c2cf83843b4a3a03bbc26c619ea6a98 /src/arch/x86/isa/insts/compare_and_test/test.py | |
parent | 09f056a1ef324b540818f1d85377fb09af44a0f1 (diff) | |
download | gem5-cfadef74d1d7ce47d0bd30a14a509a15a354849a.tar.xz |
x86 fixes
Make the emulation environment consider the rex prefix.
Implement and hook in forms of j, jmp, cmp, syscall, movzx
Added a format for an instruction to carry a call to the SE mode syscalls system
Made memory instructions which refer to the rip do so directly
Made the operand size overridable in the microassembly
Made the "ext" field of register operations 16 bits to hold a sparse encoding of flags to set or conditions to predicate on
Added an explicit "rax" operand for the syscall format
Implemented syscall returns.
--HG--
extra : convert_revision : ae84bd8c6a1d400906e17e8b8c4185f2ebd4c5f2
Diffstat (limited to 'src/arch/x86/isa/insts/compare_and_test/test.py')
-rw-r--r-- | src/arch/x86/isa/insts/compare_and_test/test.py | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/isa/insts/compare_and_test/test.py b/src/arch/x86/isa/insts/compare_and_test/test.py index 1d2364f0f..8da33899a 100644 --- a/src/arch/x86/isa/insts/compare_and_test/test.py +++ b/src/arch/x86/isa/insts/compare_and_test/test.py @@ -63,7 +63,7 @@ def macroop TEST_M_R def macroop TEST_P_R { rdip t7 - ld t1, ds, [scale, index, base], disp + ld t1, ds, [0, t0, t7], disp and t0, t1, reg, flags=(SF, ZF, PF) }; @@ -82,7 +82,7 @@ def macroop TEST_M_I def macroop TEST_P_I { rdip t7 - ld t1, ds, [scale, index, base], disp + ld t1, ds, [0, t0, t7], disp limm t2, imm and t0, t1, t2, flags=(SF, ZF, PF) }; |