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author | Ali Saidi <Ali.Saidi@ARM.com> | 2015-01-25 07:22:17 -0500 |
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committer | Ali Saidi <Ali.Saidi@ARM.com> | 2015-01-25 07:22:17 -0500 |
commit | 0bd986015b2de741dc741f10e5afeaf5d8890ba1 (patch) | |
tree | b264b3fd434124d7b04eb4a6b337cb38e8ccb305 /src/arch/x86 | |
parent | 6c4a23c1c637d77f60df9516d0f36c71d12a2298 (diff) | |
download | gem5-0bd986015b2de741dc741f10e5afeaf5d8890ba1.tar.xz |
cpu: Put all CPU instruction tracers in a single file
Diffstat (limited to 'src/arch/x86')
-rw-r--r-- | src/arch/x86/X86NativeTrace.py | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/X86NativeTrace.py b/src/arch/x86/X86NativeTrace.py index 281a2df50..e6eae8918 100644 --- a/src/arch/x86/X86NativeTrace.py +++ b/src/arch/x86/X86NativeTrace.py @@ -28,7 +28,7 @@ from m5.SimObject import SimObject from m5.params import * -from NativeTrace import NativeTrace +from CPUTracers import NativeTrace class X86NativeTrace(NativeTrace): type = 'X86NativeTrace' |