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path: root/src/arch/x86
AgeCommit message (Expand)Author
2019-03-18invisispec-1.0 sourceIru Cai
2018-03-14x86: Simplify the implementations of RDTSC and RDTSCP slightly.Gabe Black
2018-03-14x86: Implement the RDTSCP instruction.Gabe Black
2018-03-14x86: Mark the RDTSC instruction as .serialize_before.Gabe Black
2018-03-14x86: Replace the .serializing directive with .serialize_(before|after).Gabe Black
2018-01-31arch-x86: consistent style of comments in system filesChristian Menard
2018-01-30arch-x86: Granularity bit and segment limitMaximilian Stein
2018-01-23arch-x86: Adding clflush, clflushopt, clwb instructionsSwapnil Haria
2018-01-23tarch, mem: Abstract the data stored in the SE page tables.Gabe Black
2018-01-23x86, mem: Rewrite the multilevel page table class.Gabe Black
2018-01-20x86, mem: Don't try to force physical addresses on the system.Gabe Black
2018-01-20x86, mem: Get rid of PageTableOps::getBasePtr.Gabe Black
2018-01-20x86, mem: Pass the multi level page table layout in as a parameter.Gabe Black
2018-01-20arch, mem: Make the page table lookup function return a pointer.Gabe Black
2018-01-20sim, arch, base: Refactor the base remote GDB class.Gabe Black
2018-01-19arch, mem, sim: Consolidate and rename the SE mode page table classes.Gabe Black
2018-01-11arch,mem: Remove the default value for page size.Gabe Black
2018-01-11arch,mem: Move page table construction into the arch classes.Gabe Black
2018-01-10alpha,arm,mips,power,riscv,sparc,x86,cpu: Get rid of ISA_HAS_DELAY_SLOT.Gabe Black
2017-12-23alpha,arm,mips,power,riscv,sparc,x86: Get rid of TheISA::NoopMachInst.Gabe Black
2017-12-23riscv,x86: Stop using the arch Nop machine instruction unnecessarily.Gabe Black
2017-12-22arch,cpu: "virtualize" the TLB interface.Gabe Black
2017-12-14misc: Updates for gcc7.2 for x86Jason Lowe-Power
2017-12-14x86: Use operand size 4 when it would be 2 for cmpxchg8b.Gabe Black
2017-12-13arm,sparc,x86,base,cpu,sim: Replace the Twin(32|64)_t types with.Gabe Black
2017-12-13x86: Rework how "split" loads/stores are handled.Gabe Black
2017-12-08x86,misc: add additional info on faulting X86 instruction, fetched PCMatt Sinclair
2017-12-06x86: Split apart x87's FSW and TOP, and add a missing break.Gabe Black
2017-12-05x86: LOOP's operand size defaults to 64 bits in 64 bit mode.Gabe Black
2017-12-04misc: Rename misc.(hh|cc) to logging.(hh|cc)Gabe Black
2017-11-07alpha,arm,mips,power,riscv,sparc,x86: Merge exec decl templates.Gabe Black
2017-11-02alpha,arm,mips,power,riscv,sparc,x86,isa: De-specialize ExecContexts.Gabe Black
2017-10-31x86: Fix VEX instruction decoding.Gabe Black
2017-10-17scons: Stop generating inc.d in the isa parser.Gabe Black
2017-10-13mem: Signal the local monitor when clearing the global monitorNikos Nikoleris
2017-09-27arch-x86: fix CondInst decoding for MOV to Control RegistersBjoern A. Zeeb
2017-09-11stats: Get rid of some kernel stats related cruft.Gabe Black
2017-08-30arch-x86: Add missing override in the X86 TLBAndreas Sandberg
2017-08-28x86: Use the new CondInst format for moves to/from control registers.Gabe Black
2017-08-28x86: Add a "CondInst" format for conditionally decoded instructions.Gabe Black
2017-07-17sim, x86: Make clone a virtual functionSean Wilson
2017-07-17x86: Add stats to X86 TLBSwapnil Haria
2017-07-12mips, x86: Refactor some Event subclasses into lambdasSean Wilson
2017-07-05cpu: Added interface for vector reg fileRekai Gonzalez-Alberquilla
2017-07-05cpu: Simplify the rename interface and use RegIdRekai Gonzalez-Alberquilla
2017-07-05arch, cpu: Architectural Register structural indexingNathanael Premillieu
2017-06-20sim, x86: Replace EventWrapper use with EventFunctionWrapperSean Wilson
2017-06-15x86: Add consistent overrides to process.hhSean Wilson
2017-06-15x86: Fixed remote debugging of simulated codeMatthias Hille
2017-05-26x86: Rework how VEX prefixes are decoded.Gabe Black