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authorGabe Black <gabeblack@google.com>2014-11-16 23:12:42 -0800
committerGabe Black <gabeblack@google.com>2014-11-16 23:12:42 -0800
commitd228db1143f3302af27cae477473a6489b19c565 (patch)
treeb401ea904615e8d2b76acca74c195ebc97037da3 /src/arch/x86
parent27b7b9e561000ce7712e6d7a28102b711cefa8a2 (diff)
downloadgem5-d228db1143f3302af27cae477473a6489b19c565.tar.xz
x86: Fix the CPUID Long Mode Address Size function.
The value in EAX has an 8 bit field for the linear address size and one for the physical address size when calling that function. A recent change implemented it but returned 0xff for both of those fields. That implies that linear and physical addresses are 255 bits wide which is wrong. When using the KVM CPU model this causes an error, presumably because some of those bits are actually reserved, or the CPU or kernel realizes 255 bits is a bad value. This change makes those values 48.
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/cpuid.cc2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/arch/x86/cpuid.cc b/src/arch/x86/cpuid.cc
index 2656cd94e..f3f9a82d7 100644
--- a/src/arch/x86/cpuid.cc
+++ b/src/arch/x86/cpuid.cc
@@ -131,7 +131,7 @@ namespace X86ISA {
0x69746e65, 0x444d4163);
break;
case LongModeAddressSize:
- result = CpuidResult(0x0000ffff, 0x00000000,
+ result = CpuidResult(0x00003030, 0x00000000,
0x00000000, 0x00000000);
break;
/* case SVMInfo: