diff options
| author | Ali Saidi <saidi@eecs.umich.edu> | 2007-09-28 13:21:52 -0400 |
|---|---|---|
| committer | Ali Saidi <saidi@eecs.umich.edu> | 2007-09-28 13:21:52 -0400 |
| commit | d325f49b70e52044fd1072afed27227ecd4b2a60 (patch) | |
| tree | 9157db931a027b3fd5d14330701b7cbf19f58483 /src/arch/x86 | |
| parent | 887cd6a273f8777580fc3a046090c6b5244e9cad (diff) | |
| download | gem5-d325f49b70e52044fd1072afed27227ecd4b2a60.tar.xz | |
Rename cycles() function to ticks()
--HG--
extra : convert_revision : 790eddb793d4f5ba35813d001037bd8601bd76a5
Diffstat (limited to 'src/arch/x86')
| -rw-r--r-- | src/arch/x86/tlb.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/tlb.cc b/src/arch/x86/tlb.cc index ad23cb7e4..d7f9e6665 100644 --- a/src/arch/x86/tlb.cc +++ b/src/arch/x86/tlb.cc @@ -95,13 +95,13 @@ DTB::translate(RequestPtr &req, ThreadContext *tc, bool write) Tick DTB::doMmuRegRead(ThreadContext *tc, Packet *pkt) { - return tc->getCpuPtr()->cycles(1); + return tc->getCpuPtr()->ticks(1); } Tick DTB::doMmuRegWrite(ThreadContext *tc, Packet *pkt) { - return tc->getCpuPtr()->cycles(1); + return tc->getCpuPtr()->ticks(1); } #endif |