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author | Gabe Black <gblack@eecs.umich.edu> | 2012-01-29 02:04:34 -0800 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2012-01-29 02:04:34 -0800 |
commit | dc0e629ea1f074691d307cde3ab7dd51a5e2102f (patch) | |
tree | 9ce01152dc0c5231748a2da03199096a87ec34f5 /src/arch/x86 | |
parent | 22a076a6d5b949db5595bbca530fe7db927f6367 (diff) | |
download | gem5-dc0e629ea1f074691d307cde3ab7dd51a5e2102f.tar.xz |
Implement Ali's review feedback.
Try to decrease indentation, and remove some redundant FullSystem checks.
Diffstat (limited to 'src/arch/x86')
-rw-r--r-- | src/arch/x86/faults.cc | 80 |
1 files changed, 41 insertions, 39 deletions
diff --git a/src/arch/x86/faults.cc b/src/arch/x86/faults.cc index e49bbdbac..e95d8e7dc 100644 --- a/src/arch/x86/faults.cc +++ b/src/arch/x86/faults.cc @@ -52,43 +52,44 @@ namespace X86ISA { void X86FaultBase::invoke(ThreadContext * tc, StaticInstPtr inst) { - if (FullSystem) { - PCState pcState = tc->pcState(); - Addr pc = pcState.pc(); - DPRINTF(Faults, "RIP %#x: vector %d: %s\n", - pc, vector, describe()); - using namespace X86ISAInst::RomLabels; - HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG); - MicroPC entry; - if (m5reg.mode == LongMode) { - if (isSoft()) { - entry = extern_label_longModeSoftInterrupt; - } else { - entry = extern_label_longModeInterrupt; - } + if (!FullSystem) { + FaultBase::invoke(tc, inst); + return; + } + + PCState pcState = tc->pcState(); + Addr pc = pcState.pc(); + DPRINTF(Faults, "RIP %#x: vector %d: %s\n", + pc, vector, describe()); + using namespace X86ISAInst::RomLabels; + HandyM5Reg m5reg = tc->readMiscRegNoEffect(MISCREG_M5_REG); + MicroPC entry; + if (m5reg.mode == LongMode) { + if (isSoft()) { + entry = extern_label_longModeSoftInterrupt; } else { - entry = extern_label_legacyModeInterrupt; + entry = extern_label_longModeInterrupt; } - tc->setIntReg(INTREG_MICRO(1), vector); - tc->setIntReg(INTREG_MICRO(7), pc); - if (errorCode != (uint64_t)(-1)) { - if (m5reg.mode == LongMode) { - entry = extern_label_longModeInterruptWithError; - } else { - panic("Legacy mode interrupts with error codes " - "aren't implementde.\n"); - } - // Software interrupts shouldn't have error codes. If one - // does, there would need to be microcode to set it up. - assert(!isSoft()); - tc->setIntReg(INTREG_MICRO(15), errorCode); - } - pcState.upc(romMicroPC(entry)); - pcState.nupc(romMicroPC(entry) + 1); - tc->pcState(pcState); } else { - FaultBase::invoke(tc, inst); + entry = extern_label_legacyModeInterrupt; } + tc->setIntReg(INTREG_MICRO(1), vector); + tc->setIntReg(INTREG_MICRO(7), pc); + if (errorCode != (uint64_t)(-1)) { + if (m5reg.mode == LongMode) { + entry = extern_label_longModeInterruptWithError; + } else { + panic("Legacy mode interrupts with error codes " + "aren't implementde.\n"); + } + // Software interrupts shouldn't have error codes. If one + // does, there would need to be microcode to set it up. + assert(!isSoft()); + tc->setIntReg(INTREG_MICRO(15), errorCode); + } + pcState.upc(romMicroPC(entry)); + pcState.nupc(romMicroPC(entry) + 1); + tc->pcState(pcState); } std::string @@ -106,12 +107,13 @@ namespace X86ISA void X86Trap::invoke(ThreadContext * tc, StaticInstPtr inst) { X86FaultBase::invoke(tc); - if (FullSystem) { - // This is the same as a fault, but it happens -after- the - // instruction. - PCState pc = tc->pcState(); - pc.uEnd(); - } + if (!FullSystem) + return; + + // This is the same as a fault, but it happens -after- the + // instruction. + PCState pc = tc->pcState(); + pc.uEnd(); } void X86Abort::invoke(ThreadContext * tc, StaticInstPtr inst) |