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author | Andreas Hansson <andreas.hansson@arm.com> | 2015-08-21 07:03:25 -0400 |
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committer | Andreas Hansson <andreas.hansson@arm.com> | 2015-08-21 07:03:25 -0400 |
commit | 6eb434c8a227cdc30b459b2b96cb4354e3312554 (patch) | |
tree | d21c3d56827a6fb3023198c867a2fdce50def012 /src/arch | |
parent | bda79817c86137a4576b4bc2fe241a67f1740f60 (diff) | |
download | gem5-6eb434c8a227cdc30b459b2b96cb4354e3312554.tar.xz |
arm, mem: Remove unused CLEAR_LL request flag
Cleaning up dead code. The CLREX stores zero directly to
MISCREG_LOCKFLAG and so the request flag is no longer needed. The
corresponding functionality in the cache tags is also removed.
Diffstat (limited to 'src/arch')
-rw-r--r-- | src/arch/arm/tlb.cc | 10 |
1 files changed, 0 insertions, 10 deletions
diff --git a/src/arch/arm/tlb.cc b/src/arch/arm/tlb.cc index 11075f02c..aee6a251a 100644 --- a/src/arch/arm/tlb.cc +++ b/src/arch/arm/tlb.cc @@ -977,16 +977,6 @@ TLB::translateFs(RequestPtr req, ThreadContext *tc, Mode mode, "flags %#x tranType 0x%x\n", vaddr_tainted, mode, isStage2, scr, sctlr, flags, tranType); - // If this is a clrex instruction, provide a PA of 0 with no fault - // This will force the monitor to set the tracked address to 0 - // a bit of a hack but this effectively clrears this processors monitor - if (flags & Request::CLEAR_LL){ - // @todo: check implications of security extensions - req->setPaddr(0); - req->setFlags(Request::UNCACHEABLE | Request::STRICT_ORDER); - req->setFlags(Request::CLEAR_LL); - return NoFault; - } if ((req->isInstFetch() && (!sctlr.i)) || ((!req->isInstFetch()) && (!sctlr.c))){ req->setFlags(Request::UNCACHEABLE | Request::STRICT_ORDER); |