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authorAndreas Hansson <andreas.hansson@arm.com>2014-09-19 10:35:18 -0400
committerAndreas Hansson <andreas.hansson@arm.com>2014-09-19 10:35:18 -0400
commit41fc8a573ea61b2463606a0714a9e563494da329 (patch)
treec038491b91eb89fa487781bca6ba5b6b1ba65ec3 /src/arch
parent619c5519fe214250d537527ec95191a9b3d6fad2 (diff)
downloadgem5-41fc8a573ea61b2463606a0714a9e563494da329.tar.xz
arch: Pass faults by const reference where possible
This patch changes how faults are passed between methods in an attempt to copy as few reference-counting pointer instances as possible. This should avoid unecessary copies being created, contributing to the increment/decrement of the reference counters.
Diffstat (limited to 'src/arch')
-rwxr-xr-xsrc/arch/arm/stage2_lookup.cc2
-rwxr-xr-xsrc/arch/arm/stage2_lookup.hh2
-rwxr-xr-xsrc/arch/arm/stage2_mmu.cc4
-rwxr-xr-xsrc/arch/arm/stage2_mmu.hh2
4 files changed, 5 insertions, 5 deletions
diff --git a/src/arch/arm/stage2_lookup.cc b/src/arch/arm/stage2_lookup.cc
index 1299ade68..59cacd527 100755
--- a/src/arch/arm/stage2_lookup.cc
+++ b/src/arch/arm/stage2_lookup.cc
@@ -171,7 +171,7 @@ Stage2LookUp::mergeTe(RequestPtr req, BaseTLB::Mode mode)
}
void
-Stage2LookUp::finish(Fault _fault, RequestPtr req,
+Stage2LookUp::finish(const Fault &_fault, RequestPtr req,
ThreadContext *tc, BaseTLB::Mode mode)
{
fault = _fault;
diff --git a/src/arch/arm/stage2_lookup.hh b/src/arch/arm/stage2_lookup.hh
index 3a1228f46..657392ea9 100755
--- a/src/arch/arm/stage2_lookup.hh
+++ b/src/arch/arm/stage2_lookup.hh
@@ -97,7 +97,7 @@ class Stage2LookUp : public BaseTLB::Translation
void markDelayed() {}
- void finish(Fault fault, RequestPtr req, ThreadContext *tc,
+ void finish(const Fault &fault, RequestPtr req, ThreadContext *tc,
BaseTLB::Mode mode);
};
diff --git a/src/arch/arm/stage2_mmu.cc b/src/arch/arm/stage2_mmu.cc
index 01451548c..98eeedb78 100755
--- a/src/arch/arm/stage2_mmu.cc
+++ b/src/arch/arm/stage2_mmu.cc
@@ -114,8 +114,8 @@ Stage2MMU::Stage2Translation::Stage2Translation(Stage2MMU &_parent,
}
void
-Stage2MMU::Stage2Translation::finish(Fault _fault, RequestPtr req, ThreadContext *tc,
- BaseTLB::Mode mode)
+Stage2MMU::Stage2Translation::finish(const Fault &_fault, RequestPtr req,
+ ThreadContext *tc, BaseTLB::Mode mode)
{
fault = _fault;
diff --git a/src/arch/arm/stage2_mmu.hh b/src/arch/arm/stage2_mmu.hh
index d1812c4ed..37eca4f56 100755
--- a/src/arch/arm/stage2_mmu.hh
+++ b/src/arch/arm/stage2_mmu.hh
@@ -78,7 +78,7 @@ class Stage2MMU : public SimObject
markDelayed() {}
void
- finish(Fault fault, RequestPtr req, ThreadContext *tc,
+ finish(const Fault &fault, RequestPtr req, ThreadContext *tc,
BaseTLB::Mode mode);
void setVirt(Addr vaddr, int size, Request::Flags flags, int masterId)