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authorAndreas Sandberg <Andreas.Sandberg@arm.com>2012-09-25 11:49:40 -0500
committerAndreas Sandberg <Andreas.Sandberg@arm.com>2012-09-25 11:49:40 -0500
commit6598241f2c188ba6f4ce035d9e1fbdd4619c7e00 (patch)
treea9785f2f7fd62f92916eb8f3900ad0427b96396d /src/cpu/BaseCPU.py
parent5f32eceeda92f45d253a0835c6643e786a91ba49 (diff)
downloadgem5-6598241f2c188ba6f4ce035d9e1fbdd4619c7e00.tar.xz
sim: Move CPU-specific methods from SimObject to the BaseCPU class
Diffstat (limited to 'src/cpu/BaseCPU.py')
-rw-r--r--src/cpu/BaseCPU.py16
1 files changed, 16 insertions, 0 deletions
diff --git a/src/cpu/BaseCPU.py b/src/cpu/BaseCPU.py
index c27fd1c27..6e5f6ff1a 100644
--- a/src/cpu/BaseCPU.py
+++ b/src/cpu/BaseCPU.py
@@ -77,6 +77,22 @@ class BaseCPU(MemObject):
type = 'BaseCPU'
abstract = True
+ @classmethod
+ def export_method_cxx_predecls(cls, code):
+ code('#include "cpu/base.hh"')
+
+
+ @classmethod
+ def export_methods(cls, code):
+ code('''
+ void switchOut();
+ void takeOverFrom(BaseCPU *cpu);
+''')
+
+ def takeOverFrom(self, old_cpu):
+ self._ccObject.takeOverFrom(old_cpu._ccObject)
+
+
system = Param.System(Parent.any, "system object")
cpu_id = Param.Int(-1, "CPU identifier")
numThreads = Param.Unsigned(1, "number of HW thread contexts")