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| author | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-04-04 16:27:04 +0100 |
|---|---|---|
| committer | Giacomo Travaglini <giacomo.travaglini@arm.com> | 2018-04-27 16:00:28 +0000 |
| commit | 5187a24d496cd16bfe440f52ff0c45ab0e185306 (patch) | |
| tree | c491ebdad23a5f9e57ef62ffeabcf2b87289f5ce /src/cpu/base.cc | |
| parent | 685cf2d1f8ae2f2ca3168a650efa1d36120783fe (diff) | |
| download | gem5-5187a24d496cd16bfe440f52ff0c45ab0e185306.tar.xz | |
sim,cpu,mem,arch: Introduced MasterInfo data structure
With this patch a gem5 System will store more info about its Masters.
While it was previously keeping track of the Master name and Master ID
only, it is now adding a per-Master pointer to the SimObject related to
the Master.
This will make it possible for a client to query a System for a Master
using either the master's name or the master's pointer.
Change-Id: I8b97d328a65cd06f329e2cdd3679451c17d2b8f6
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/9781
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Maintainer: Nikos Nikoleris <nikos.nikoleris@arm.com>
Diffstat (limited to 'src/cpu/base.cc')
| -rw-r--r-- | src/cpu/base.cc | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/base.cc b/src/cpu/base.cc index 4fd804b9c..c576f1def 100644 --- a/src/cpu/base.cc +++ b/src/cpu/base.cc @@ -127,8 +127,8 @@ CPUProgressEvent::description() const BaseCPU::BaseCPU(Params *p, bool is_checker) : MemObject(p), instCnt(0), _cpuId(p->cpu_id), _socketId(p->socket_id), - _instMasterId(p->system->getMasterId(name() + ".inst")), - _dataMasterId(p->system->getMasterId(name() + ".data")), + _instMasterId(p->system->getMasterId(this, "inst")), + _dataMasterId(p->system->getMasterId(this, "data")), _taskId(ContextSwitchTaskId::Unknown), _pid(invldPid), _switchedOut(p->switched_out), _cacheLineSize(p->system->cacheLineSize()), interrupts(p->interrupts), profileEvent(NULL), |