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| author | Gabe Black <gblack@eecs.umich.edu> | 2007-07-31 17:34:08 -0700 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2007-07-31 17:34:08 -0700 |
| commit | 4bdabe1254a8ad9bb960f57eb35cec919b370de8 (patch) | |
| tree | 318b34065ed9eb3f30852fee11eb398a92134652 /src/cpu/base_dyn_inst.hh | |
| parent | 55ade789d34e541cc538c7c5a4f286a313cfd8ba (diff) | |
| download | gem5-4bdabe1254a8ad9bb960f57eb35cec919b370de8.tar.xz | |
Add a flag to indicate an instruction triggers a syscall in SE mode.
--HG--
extra : convert_revision : 1d0b3afdd8254f5b2fb4bbff1fa4a0536f78bb06
Diffstat (limited to 'src/cpu/base_dyn_inst.hh')
| -rw-r--r-- | src/cpu/base_dyn_inst.hh | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh index a55c1e3c0..362babeff 100644 --- a/src/cpu/base_dyn_inst.hh +++ b/src/cpu/base_dyn_inst.hh @@ -498,6 +498,7 @@ class BaseDynInst : public FastAlloc, public RefCounted bool isQuiesce() const { return staticInst->isQuiesce(); } bool isIprAccess() const { return staticInst->isIprAccess(); } bool isUnverifiable() const { return staticInst->isUnverifiable(); } + bool isSyscall() const { return staticInst->isSyscall(); } bool isMacroop() const { return staticInst->isMacroop(); } bool isMicroop() const { return staticInst->isMicroop(); } bool isDelayedCommit() const { return staticInst->isDelayedCommit(); } |