summaryrefslogtreecommitdiff
path: root/src/cpu/base_dyn_inst.hh
diff options
context:
space:
mode:
authorAndreas Sandberg <andreas.sandberg@arm.com>2016-04-06 19:43:31 +0100
committerAndreas Sandberg <andreas.sandberg@arm.com>2016-04-06 19:43:31 +0100
commitbe28d96510e0e722db83b26f1a12d3f5de979b32 (patch)
tree6a7e1807397f002f51fddb34568b89250fca45c8 /src/cpu/base_dyn_inst.hh
parent8615b27174ae06db4665016c877b1e88031af203 (diff)
downloadgem5-be28d96510e0e722db83b26f1a12d3f5de979b32.tar.xz
Revert power patch sets with unexpected interactions
The following patches had unexpected interactions with the current upstream code and have been reverted for now: e07fd01651f3: power: Add support for power models 831c7f2f9e39: power: Low-power idle power state for idle CPUs 4f749e00b667: power: Add power states to ClockedObject Signed-off-by: Andreas Sandberg <andreas.sandberg@arm.com> --HG-- extra : amend_source : 0b6fb073c6bbc24be533ec431eb51fbf1b269508
Diffstat (limited to 'src/cpu/base_dyn_inst.hh')
-rw-r--r--src/cpu/base_dyn_inst.hh4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/cpu/base_dyn_inst.hh b/src/cpu/base_dyn_inst.hh
index e846f6790..031337aec 100644
--- a/src/cpu/base_dyn_inst.hh
+++ b/src/cpu/base_dyn_inst.hh
@@ -886,7 +886,7 @@ BaseDynInst<Impl>::initiateMemRead(Addr addr, unsigned size, unsigned flags)
sreqHigh = savedSreqHigh;
} else {
req = new Request(asid, addr, size, flags, masterId(), this->pc.instAddr(),
- thread->contextId());
+ thread->contextId(), threadNumber);
req->taskId(cpu->taskId());
@@ -942,7 +942,7 @@ BaseDynInst<Impl>::writeMem(uint8_t *data, unsigned size,
sreqHigh = savedSreqHigh;
} else {
req = new Request(asid, addr, size, flags, masterId(), this->pc.instAddr(),
- thread->contextId());
+ thread->contextId(), threadNumber);
req->taskId(cpu->taskId());