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| author | Korey Sewell <ksewell@umich.edu> | 2009-05-12 15:01:15 -0400 |
|---|---|---|
| committer | Korey Sewell <ksewell@umich.edu> | 2009-05-12 15:01:15 -0400 |
| commit | 1c7e988272efead94d2cfbe3fd65ba454d3e1fc1 (patch) | |
| tree | 55affa4470c6cc8cdadc8da953895a0b3a163a24 /src/cpu/inorder/resources/tlb_unit.hh | |
| parent | f41df0ee08467711c613faadf9879052ab7196ed (diff) | |
| download | gem5-1c7e988272efead94d2cfbe3fd65ba454d3e1fc1.tar.xz | |
inorder-mem: skeleton support for prefetch/writehints
Diffstat (limited to 'src/cpu/inorder/resources/tlb_unit.hh')
| -rw-r--r-- | src/cpu/inorder/resources/tlb_unit.hh | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/inorder/resources/tlb_unit.hh b/src/cpu/inorder/resources/tlb_unit.hh index b0cdac2a2..67e1bda1d 100644 --- a/src/cpu/inorder/resources/tlb_unit.hh +++ b/src/cpu/inorder/resources/tlb_unit.hh @@ -112,6 +112,10 @@ class TLBUnitRequest : public ResourceRequest { flags = inst->getMemFlags(); } + if (req_size == 0 && (inst->isDataPrefetch() || inst->isInstPrefetch())) { + req_size = 8; + } + // @TODO: Add Vaddr & Paddr functions inst->memReq = new Request(inst->readTid(), aligned_addr, req_size, flags, inst->readPC(), res->cpu->readCpuId(), inst->readTid()); |