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authorAndreas Sandberg <andreas@sandberg.pp.se>2014-03-16 17:30:24 +0100
committerAndreas Sandberg <andreas@sandberg.pp.se>2014-03-16 17:30:24 +0100
commit5db547bca46f23aa5cf25aa5d38efae9ef1eabc2 (patch)
tree01db21e126164a21473bc5e4aecca88520562ca3 /src/cpu/kvm/x86_cpu.hh
parentf791e7b313c6f5c2b30f96c35f675d523def8a3a (diff)
downloadgem5-5db547bca46f23aa5cf25aa5d38efae9ef1eabc2.tar.xz
kvm: x86: Adjust PC to remove the CS segment base address
gem5 seems to store the PC as RIP+CS_BASE. This is not what KVM expects, so we need to subtract CS_BASE prior to transferring the PC into KVM. This changeset adds the necessary PC manipulation and refactors thread context updates slightly to avoid reading registers multiple times from KVM. --HG-- extra : rebase_source : 3f0569dca06a1fcd8694925f75c8918d954ada44
Diffstat (limited to 'src/cpu/kvm/x86_cpu.hh')
-rw-r--r--src/cpu/kvm/x86_cpu.hh9
1 files changed, 5 insertions, 4 deletions
diff --git a/src/cpu/kvm/x86_cpu.hh b/src/cpu/kvm/x86_cpu.hh
index 7dacdb03f..bfd090ff7 100644
--- a/src/cpu/kvm/x86_cpu.hh
+++ b/src/cpu/kvm/x86_cpu.hh
@@ -209,13 +209,14 @@ class X86KvmCPU : public BaseKvmCPU
* @{
*/
/** Update integer registers */
- void updateThreadContextRegs();
+ void updateThreadContextRegs(const struct kvm_regs &regs,
+ const struct kvm_sregs &sregs);
/** Update control registers (CRx, segments, etc.) */
- void updateThreadContextSRegs();
+ void updateThreadContextSRegs(const struct kvm_sregs &sregs);
/** Update FPU and SIMD registers using the legacy API */
- void updateThreadContextFPU();
+ void updateThreadContextFPU(const struct kvm_fpu &fpu);
/** Update FPU and SIMD registers using the XSave API */
- void updateThreadContextXSave();
+ void updateThreadContextXSave(const struct kvm_xsave &kxsave);
/** Update MSR registers */
void updateThreadContextMSRs();
/** @} */