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| author | Steve Reinhardt <stever@eecs.umich.edu> | 2007-06-30 20:35:42 -0700 |
|---|---|---|
| committer | Steve Reinhardt <stever@eecs.umich.edu> | 2007-06-30 20:35:42 -0700 |
| commit | 3ad761bc8e89ff034fbf5ec6d8e9661e1025dcd7 (patch) | |
| tree | bf5c36872adcb98bede2dd5c7c396ed8c3737a82 /src/cpu/o3/lsq_unit.hh | |
| parent | 5e59739416bf195173f4b37ba9afb1cb8ae16566 (diff) | |
| download | gem5-3ad761bc8e89ff034fbf5ec6d8e9661e1025dcd7.tar.xz | |
Make CPU models use new LoadLockedReq/StoreCondReq commands.
--HG--
extra : convert_revision : ab78d9d1d88c3698edfd653d71c8882e1272b781
Diffstat (limited to 'src/cpu/o3/lsq_unit.hh')
| -rw-r--r-- | src/cpu/o3/lsq_unit.hh | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/src/cpu/o3/lsq_unit.hh b/src/cpu/o3/lsq_unit.hh index d964b9f9f..be9224099 100644 --- a/src/cpu/o3/lsq_unit.hh +++ b/src/cpu/o3/lsq_unit.hh @@ -643,7 +643,10 @@ LSQUnit<Impl>::read(Request *req, T &data, int load_idx) // if we the cache is not blocked, do cache access if (!lsq->cacheBlocked()) { PacketPtr data_pkt = - new Packet(req, MemCmd::ReadReq, Packet::Broadcast); + new Packet(req, + (req->isLocked() ? + MemCmd::LoadLockedReq : MemCmd::ReadReq), + Packet::Broadcast); data_pkt->dataStatic(load_inst->memData); LSQSenderState *state = new LSQSenderState; |