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| author | Rekai <Rekai.GonzalezAlberquilla@arm.com> | 2015-03-02 04:00:38 -0500 |
|---|---|---|
| committer | Rekai <Rekai.GonzalezAlberquilla@arm.com> | 2015-03-02 04:00:38 -0500 |
| commit | 3d5434022a2f97e5e855e17c8e46b08e38c8bb9e (patch) | |
| tree | 9f2c3ec3404559d661d1e9537cac345b43b4d514 /src/cpu/o3/rename_impl.hh | |
| parent | 987de4f5ccc5639ca03cc3c90e48bc06b5429823 (diff) | |
| download | gem5-3d5434022a2f97e5e855e17c8e46b08e38c8bb9e.tar.xz | |
cpu: o3 register renaming request handling improved
Now, prior to the renaming, the instruction requests the exact amount of
registers it will need, and the rename_map decides whether the instruction is
allowed to proceed or not.
Diffstat (limited to 'src/cpu/o3/rename_impl.hh')
| -rw-r--r-- | src/cpu/o3/rename_impl.hh | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/src/cpu/o3/rename_impl.hh b/src/cpu/o3/rename_impl.hh index 04a9020d7..7bf33d3ff 100644 --- a/src/cpu/o3/rename_impl.hh +++ b/src/cpu/o3/rename_impl.hh @@ -1,5 +1,5 @@ /* - * Copyright (c) 2010-2012, 2014 ARM Limited + * Copyright (c) 2010-2012, 2014-2015 ARM Limited * Copyright (c) 2013 Advanced Micro Devices, Inc. * All rights reserved. * @@ -633,7 +633,9 @@ DefaultRename<Impl>::renameInsts(ThreadID tid) // Check here to make sure there are enough destination registers // to rename to. Otherwise block. - if (renameMap[tid]->numFreeEntries() < inst->numDestRegs()) { + if (!renameMap[tid]->canRename(inst->numIntDestRegs(), + inst->numFPDestRegs(), + inst->numCCDestRegs())) { DPRINTF(Rename, "Blocking due to lack of free " "physical registers to rename to.\n"); blockThisCycle = true; |