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author | Gabe Black <gblack@eecs.umich.edu> | 2006-12-06 06:00:04 -0500 |
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committer | Gabe Black <gblack@eecs.umich.edu> | 2006-12-06 06:00:04 -0500 |
commit | 75b93179ab96de17c1ea62c3928d5fca9d5eb1be (patch) | |
tree | 0042ef6367ca260e2c800e3e36ac4fcc85918e1f /src/cpu/o3/thread_context_impl.hh | |
parent | 1886795368e0f07875f8f7ff70f09a8e200e6a85 (diff) | |
download | gem5-75b93179ab96de17c1ea62c3928d5fca9d5eb1be.tar.xz |
Flattening and syscallReturn fixes
src/cpu/o3/thread_context_impl.hh:
Use flattened indices
src/cpu/simple_thread.hh:
Use flattened indices, and pass a thread context to setSyscallReturn rather than a register file.
src/cpu/thread_context.hh:
The SyscallReturn class is no longer in arch/syscallreturn.hh
--HG--
extra : convert_revision : ed84bb8ac5ef0774526ecd0d7270b0c60cd3708e
Diffstat (limited to 'src/cpu/o3/thread_context_impl.hh')
-rwxr-xr-x | src/cpu/o3/thread_context_impl.hh | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/src/cpu/o3/thread_context_impl.hh b/src/cpu/o3/thread_context_impl.hh index 0180756e3..29c00a0c3 100755 --- a/src/cpu/o3/thread_context_impl.hh +++ b/src/cpu/o3/thread_context_impl.hh @@ -29,6 +29,7 @@ * Korey Sewell */ +#include "arch/regfile.hh" #include "cpu/o3/thread_context.hh" #include "cpu/quiesce_event.hh" @@ -303,6 +304,7 @@ template <class Impl> uint64_t O3ThreadContext<Impl>::readIntReg(int reg_idx) { + reg_idx = TheISA::flattenIntIndex(this, reg_idx); return cpu->readArchIntReg(reg_idx, thread->readTid()); } @@ -347,6 +349,7 @@ template <class Impl> void O3ThreadContext<Impl>::setIntReg(int reg_idx, uint64_t val) { + reg_idx = TheISA::flattenIntIndex(this, reg_idx); cpu->setArchIntReg(reg_idx, val, thread->readTid()); // Squash if we're not already in a state update mode. |