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author | Korey Sewell <ksewell@umich.edu> | 2009-05-12 15:01:14 -0400 |
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committer | Korey Sewell <ksewell@umich.edu> | 2009-05-12 15:01:14 -0400 |
commit | b569f8f0ed8dcf32347f0d4f68d2d7572a5d1353 (patch) | |
tree | 14b4f11266600c44ec4c1846665277115911b363 /src/cpu/o3 | |
parent | 1c8dfd92543aba5f49e464b17e7e8143fc01a58c (diff) | |
download | gem5-b569f8f0ed8dcf32347f0d4f68d2d7572a5d1353.tar.xz |
inorder-bpred: edits to handle non-delay-slot ISAs
Changes so that InOrder can work for a non-delay-slot ISA like Alpha. Typically, changes have to do with handling misspeculated branches at different points in pipeline
Diffstat (limited to 'src/cpu/o3')
-rwxr-xr-x | src/cpu/o3/thread_context.hh | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/cpu/o3/thread_context.hh b/src/cpu/o3/thread_context.hh index e7c9c3b8f..b10305d5d 100755 --- a/src/cpu/o3/thread_context.hh +++ b/src/cpu/o3/thread_context.hh @@ -265,9 +265,6 @@ class O3ThreadContext : public ThreadContext virtual void setNextNPC(uint64_t val) { -#if THE_ISA == ALPHA_ISA - panic("Not supported on Alpha!"); -#endif this->cpu->setNextNPC(val, this->thread->threadId()); } }; |