cpu,alpha,mips,power,riscv,sparc: Get rid of eaComp and memAccInst.

Neither of these were used, particularly memAccInst.

Change-Id: I4ac9e44cf624e5de42519d586d7b699f08a2cdfc
Reviewed-on: https://gem5-review.googlesource.com/6601
Maintainer: Gabe Black <gabeblack@google.com>
Reviewed-by: Andreas Sandberg <andreas.sandberg@arm.com>

1 files changed, 0 insertions, 19 deletions

diff --git a/src/cpu/o3/dyn_inst.hh b/src/cpu/o3/dyn_inst.hh
index 0643e7e30..8a0ae1d56 100644
--- a/src/cpu/o3/dyn_inst.hh
+++ b/src/cpu/o3/dyn_inst.hh
@@ -429,25 +429,6 @@ class BaseO3DynInst : public BaseDynInst<Impl>
         panic("MIPS MT not defined for O3 CPU.\n");
     }
 #endif
-
-  public:
-    /** Calculates EA part of a memory instruction. Currently unused,
-     * though it may be useful in the future if we want to split
-     * memory operations into EA calculation and memory access parts.
-     */
-    Fault calcEA()
-    {
-        return this->staticInst->eaCompInst()->execute(this, this->traceData);
-    }
-
-    /** Does the memory access part of a memory instruction. Currently unused,
-     * though it may be useful in the future if we want to split
-     * memory operations into EA calculation and memory access parts.
-     */
-    Fault memAccess()
-    {
-        return this->staticInst->memAccInst()->execute(this, this->traceData);
-    }
 };
 
 #endif // __CPU_O3_ALPHA_DYN_INST_HH__