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| author | Gabe Black <gblack@eecs.umich.edu> | 2006-10-31 02:08:44 -0500 |
|---|---|---|
| committer | Gabe Black <gblack@eecs.umich.edu> | 2006-10-31 02:08:44 -0500 |
| commit | 4862879a9420c52d48532d957b616c458b643a1e (patch) | |
| tree | 576a3c724920ede579d5f9fe7ec52e41911a306a /src/cpu/simple/base.hh | |
| parent | 79d4bede429bb5c3413fcd0cfe6f2d1790c8312d (diff) | |
| download | gem5-4862879a9420c52d48532d957b616c458b643a1e.tar.xz | |
Put the Alpha tlb stuff into the AlphaISA namespace, and give the classes more neutral names.
--HG--
extra : convert_revision : 702c715b7516a16602172deb1b78d6a7ab848fd4
Diffstat (limited to 'src/cpu/simple/base.hh')
| -rw-r--r-- | src/cpu/simple/base.hh | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh index af6b6f835..1a9fc5127 100644 --- a/src/cpu/simple/base.hh +++ b/src/cpu/simple/base.hh @@ -47,8 +47,11 @@ // forward declarations #if FULL_SYSTEM class Processor; -class AlphaITB; -class AlphaDTB; +namespace TheISA +{ + class ITB; + class DTB; +} class MemObject; class RemoteGDB; @@ -97,8 +100,8 @@ class BaseSimpleCPU : public BaseCPU { MemObject *mem; #if FULL_SYSTEM - AlphaITB *itb; - AlphaDTB *dtb; + TheISA::ITB *itb; + TheISA::DTB *dtb; #else Process *process; #endif |