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authorGabe Black <gblack@eecs.umich.edu>2007-03-15 02:47:42 +0000
committerGabe Black <gblack@eecs.umich.edu>2007-03-15 02:47:42 +0000
commita2b56088fb4d12aee73ecfeaba88cfa46f98567e (patch)
tree7c6787e2757e9e5d047a3b6cec1b71b4eef915f1 /src/cpu/simple/base.hh
parentce18d900a17cdda2cc041b51c56e6c84fb155331 (diff)
downloadgem5-a2b56088fb4d12aee73ecfeaba88cfa46f98567e.tar.xz
Make the predecoder an object with it's own switched header file. Start adding predecoding functionality to x86.
src/arch/SConscript: src/arch/alpha/utility.hh: src/arch/mips/utility.hh: src/arch/sparc/utility.hh: src/cpu/base.hh: src/cpu/o3/fetch.hh: src/cpu/o3/fetch_impl.hh: src/cpu/simple/atomic.cc: src/cpu/simple/base.cc: src/cpu/simple/base.hh: src/cpu/static_inst.hh: src/arch/alpha/predecoder.hh: src/arch/mips/predecoder.hh: src/arch/sparc/predecoder.hh: Make the predecoder an object with it's own switched header file. --HG-- extra : convert_revision : 77206e29089130e86b97164c30022a062699ba86
Diffstat (limited to 'src/cpu/simple/base.hh')
-rw-r--r--src/cpu/simple/base.hh9
1 files changed, 7 insertions, 2 deletions
diff --git a/src/cpu/simple/base.hh b/src/cpu/simple/base.hh
index 10787c474..a7686bbb1 100644
--- a/src/cpu/simple/base.hh
+++ b/src/cpu/simple/base.hh
@@ -33,6 +33,7 @@
#ifndef __CPU_SIMPLE_BASE_HH__
#define __CPU_SIMPLE_BASE_HH__
+#include "arch/predecoder.hh"
#include "base/statistics.hh"
#include "config/full_system.hh"
#include "cpu/base.hh"
@@ -63,6 +64,10 @@ class Process;
class RemoteGDB;
class GDBListener;
+namespace TheISA
+{
+ class Predecoder;
+}
class ThreadContext;
class Checkpoint;
@@ -123,8 +128,8 @@ class BaseSimpleCPU : public BaseCPU
// current instruction
TheISA::MachInst inst;
- // current extended machine instruction
- TheISA::ExtMachInst extMachInst;
+ // The predecoder
+ TheISA::Predecoder predecoder;
// Static data storage
TheISA::LargestRead dataReg;