cpu: Add byteEnable assertions to readMem and initateMemRead

Those are already present in writeMem; looking for consistency

Change-Id: Ib85e0db228bc73e3ac64155d1290444cf6864a8c
Signed-off-by: Giacomo Travaglini <giacomo.travaglini@arm.com>
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/23281
Reviewed-by: Jason Lowe-Power <jason@lowepower.com>
Reviewed-by: Daniel Carvalho <odanrc@yahoo.com.br>
Reviewed-by: Bobby R. Bruce <bbruce@ucdavis.edu>
Tested-by: kokoro <noreply+kokoro@google.com>
Maintainer: Bobby R. Bruce <bbruce@ucdavis.edu>

1 files changed, 2 insertions, 0 deletions

diff --git a/src/cpu/simple/exec_context.hh b/src/cpu/simple/exec_context.hh
index 48a9f9423..8e4aa3961 100644
--- a/src/cpu/simple/exec_context.hh
+++ b/src/cpu/simple/exec_context.hh
@@ -440,6 +440,7 @@ class SimpleExecContext : public ExecContext {
             const std::vector<bool>& byteEnable = std::vector<bool>())
         override
     {
+        assert(byteEnable.empty() || byteEnable.size() == size);
         return cpu->readMem(addr, data, size, flags, byteEnable);
     }
 
@@ -449,6 +450,7 @@ class SimpleExecContext : public ExecContext {
                     const std::vector<bool>& byteEnable = std::vector<bool>())
         override
     {
+        assert(byteEnable.empty() || byteEnable.size() == size);
         return cpu->initiateMemRead(addr, size, flags, byteEnable);
     }